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Search (731)
Compare 731 IP from 98 vendors (1 - 10)
  • Ultra high-performance low-power ADC
    • TSMC 28nm
    • Ultra high-performance low-power ADC
    • 12-bit ADC resolution
    • Sampling rate up to 5GSPS
    Block Diagram -- Ultra high-performance low-power ADC
  • 10-bit SAR ADC - XFAB XT018
    • The TS_ADC_10b_X8 is a 10-bit capacitive successive approximation register (SAR) Analog-to-Digital converter (ADC).
    • It operates with a 3.3 V analog power supply, a 1.8 V digital power supply, and an external voltage reference.
    • The ADC converts single-ended input voltages and requires no external S/H circuit.
    Block Diagram -- 10-bit SAR ADC - XFAB XT018
  • 12-bit, 400 MSPS SAR ADC - TSMC 12nm FFC
    • 12-bit Resolution
    • 400 MSPS Sampling Rate
    • 1 GHz Input Bandwidth
    • Differential voltage input
    • 4.2 mW Power
  • 10-bit Pipeline ADC - Tower 180 nm
    • 10-bit resolution
    • 25 MSPS sampling rate
    • 6 mW power
    • 25 MHz Input Bandwidth
  • 106dB, 24-bit audio three-channels ADC in TSMC 40uLP
    • tADC106-SW1-LR.01_TSMC_40_uLP is a mixed (analog and digital) Virtual Component (ViC) in TSMC 40uLP containing a three-channel ADC and additional functions offering an ideal mixed signal front end for low power and high quality audio applications.
    Block Diagram -- 106dB, 24-bit audio three-channels ADC in TSMC 40uLP
  • 10Bit 25MHz sigma-delta ADC for VT sensor on SMIC 40nm
    • The present IP is a single-ended 10-bit Sigma-Delta (SD) analog-to-digital converter
    • This ADC operates with one 1.1V power supplies with low power consumption
    • The 1.1V digital power supply is employed for easy integration with 1.1V digital signal processors and macro processors.
  • 13-bit, 80 MSPS ADC - TSMC 65nm
    • The A13B80M is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block.
    • It is a hybrid-SAR ADC, with 13-bit resolution and a sampling speed of 80 megasamples per second (MSPS).
  • 12-bit, 9.2 GSPS Pipeline ADC - GlobalFoundries 22nm
    • The A12B9G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block.
    • It is a time-interleaved successive approximation register (SAR) ADC, with 12-bit resolution, and a sampling speed of 9 giga samples per second (GSPS).
  • 12-bit, 200 MSPS Pipeline ADC - TSMC 28nm
    • The A12B200M is a low-power, analog to digital converter (ADC) intellectually property (IP) design block.
    • It is a hybrid successive approximation register (SAR) ADC, with 12-bit resolution, and a sampling speed of 200 megasamples per second (MSPS).
  • 12-bit ADC on Samsung 8nm LN08LPP
    • The sf_adc0802x_ln08lpp_306011 is a 1.8V/0.75V dual supply-voltage 16-ch 12-bit analog-to-digital converter (ADC) that supports conversion rate (FS) up to 1MS/s, designed in 8nm CMOS FinFET process.
    • It consists of a 16-to-1 analog input MUX, a successive approximation (SAR) type monolithic ADC, a clock generator, and level-shifters for low voltage digital interface.
    Block Diagram -- 12-bit ADC on Samsung 8nm LN08LPP
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