AES IP
All offers in
AES IP
Filter
Compare
124
AES IP
from
42
vendors
(1
-
10)
-
AES-SX Secure Core - High-Throughput AES Core with Advanced SCA/FI Protection for Performance-Critical Systems
- The High-Performance AES IP core is a fast, silicon-proven cryptographic engine designed for systems with demanding encryption workloads.
- Built on a 20 S-box parallel architecture, it delivers exceptional AES-128/256 encryption and decryption throughput while supporting standard modes including ECB, CBC, and CTR (excluding GCM, XTS, and CBC-MAC).
-
AES-XTS Multi-Booster
- The AES-XTS Multi-Booster crypto engine includes a generic & scalable implementation of the AES algorithm making the solution suitable for a wide range of low-cost & high-end applications (including key, tweak, input and output registers and Galois field multiplier).
-
AES Mutli-Purpose crypto engine
- The AES Multi-Purpose crypto engine includes a generic and scalable implementation of the AES algorithm and a configurable wrapper making the solution suitable for a wide range of low-cost & high-end applications.
-
AES Multi-purpose crypto engine
- ASIC and FPGA
- Supports a wide selection of programmable ciphering modes based on NIST SP 800-38:
- Masking option available with excellent protection against SPA & DPA
- Context switching
-
AES-GCM Ultra-low latency crypto engine
- The AES-GCM Ultra-low latency crypto engine is targeted for CXL link encryption with an implementation of the AES-GCM algorithm compliant with the NIST SP 800-38D standard.
- The unique architecture enables high throughput while maintaining an optimal resource usage.
-
AES-XTS Muti-Booster
- The AES-XTS Multibooster crypto engine includes a generic & scalable implementation of the AES algorithm making the solution suitable for a wide range of low-cost & high-end applications (including key, tweak, input and output registers and Galois field multiplier).
-
AES Engine IP
- The AES engine IP is a high-performance cryptographic engine operates in AES NIST Federal information processing standard FIPS-197.
- It supports AES-ECB AES-XTS mode and 128/256 key-length both encryption/decryption.
- The core engine supports 128/256/512 data width operation.
-
NIST AES Key Wrap/Unwrap Core
- Small size: AKW1 starts from less than 8,000 ASIC gates
- Completely self-contained: does not require external memory
- Supports both encryption (wrap) and decryption (unwrap). Encryption-only and decryption only versions available.
- Includes AES key expansion
-
Ultra-Compact Advanced Encryption Standard (AES, FIPS-197) Core
- Encrypts using the AES Rijndael Block Cipher Algorithm.
- Satisfies Federal Information Processing Standard (FIPS) Publication 197 from the US National Institute of Standards and Technology (NIST). FIPS-197 validated (AESAVS).
- Processes 128-bit data blocks with 8, 16 or 32-bit data interface
- Employs key sizes of 128 bits (AES128), 192, or 256 bits (AES256)
-
802.15.3 CCM AES Core
- Small size: From 9,500 ASIC gates at 802.15.3 data Speeds.
- High data rate: up to 8 Gbps for IEEE 802.15.3c / ECMA-387 (TC 48) / IEEE 802.11ad 60 GHz PHY
- Completely self-contained: does not require external memory
- Includes encryption, decryption, key expansion and data interface
