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USB High-Speed PHY IP

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Compare 223 IP from 17 vendors (1 - 10)
  • USB PHY Solution
    • Brite provides USB2.0 OTG PHY which is a complete mixed-signal IP solution designed to implement OTG connectivity for a System-on-Chip (SoC) design.
    • The USB2.0 OTG PHY supports the USB2.0 480Mbps protocol and data rate, and is backward compatible with the USB 1.1 1.5Mbps and 12Mbps protocol and data rates.
    • It has been verified by a number of end products, especially suitable for the current popular internet of things applications.
    Block Diagram -- USB PHY Solution
  • USB 2.0 PHY IP core
    • Complies with USB specifications, rev. 2.0 and 1.1
    • Complies with UTMI+ specification, level 3, rev. 1.0
    • Supports 480Mb/s (HS), 12Mb/s (FS) and 1.5MB/s (LS) serial data transmission rates
    • Supports 8-bit unidirectional Parallel Interface Engine (PIE) bus for HS, FS and LS modes, and Serial Interface Engine (SIE) for FS and LS modes
    Block Diagram -- USB 2.0 PHY IP core
  • High Speed Inter-CHIP USB 2.0 PHY
    • High-Speed 480Mbps data rate only
    • Source-synchronous serial interface
    • No power consumed unless a transfer is in progress.
    • Maximum trace length of 10cm
    Block Diagram -- High Speed Inter-CHIP USB 2.0 PHY
  • USB 3.0 PHY, SMIC 40LL25 x1
    • Part of a comprehensive IP solution including xHCI host and device controllers, PHYs, verification IP, IP Prototyping Kits and IP software development kits
    • Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes
    • USB-C femtoPHY IP supports USB Type-C specification
    Block Diagram -- USB 3.0 PHY, SMIC 40LL25 x1
  • USB 3.0 PHY - UMC 65LL25 x1
    • Part of a comprehensive IP solution including xHCI host and device controllers, PHYs, verification IP, IP Prototyping Kits and IP software development kits
    • Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes
    • USB-C femtoPHY IP supports USB Type-C specification
    Block Diagram -- USB 3.0 PHY - UMC 65LL25 x1
  • USB 3.0 PHY - UMC 40LP25 x1
    • Part of a comprehensive IP solution including xHCI host and device controllers, PHYs, verification IP, IP Prototyping Kits and IP software development kits
    • Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes
    • USB-C femtoPHY IP supports USB Type-C specification
    Block Diagram -- USB 3.0 PHY - UMC 40LP25 x1
  • USB 3.0 PHY - TSMC 65LP x1
    • Part of a comprehensive IP solution including xHCI host and device controllers, PHYs, verification IP, IP Prototyping Kits and IP software development kits
    • Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes
    • USB-C femtoPHY IP supports USB Type-C specification
    Block Diagram -- USB 3.0 PHY - TSMC 65LP x1
  • USB 3.0 PHY - TSMC 55LP25 x1
    • Part of a comprehensive IP solution including xHCI host and device controllers, PHYs, verification IP, IP Prototyping Kits and IP software development kits
    • Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes
    • USB-C femtoPHY IP supports USB Type-C specification
    Block Diagram -- USB 3.0 PHY - TSMC 55LP25 x1
  • USB 3.0 PHY - TSMC 40LP25 x1
    • Part of a comprehensive IP solution including xHCI host and device controllers, PHYs, verification IP, IP Prototyping Kits and IP software development kits
    • Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes
    • USB-C femtoPHY IP supports USB Type-C specification
    Block Diagram -- USB 3.0 PHY - TSMC 40LP25 x1
  • USB 3.0 PHY - TSMC 40G x1
    • Part of a comprehensive IP solution including xHCI host and device controllers, PHYs, verification IP, IP Prototyping Kits and IP software development kits
    • Designed for advanced 1.8V CMOS planar bulk and FinFET process nodes
    • USB-C femtoPHY IP supports USB Type-C specification
    Block Diagram -- USB 3.0 PHY - TSMC 40G x1
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