USB 2.0 IP

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Compare 494 IP from 47 vendors (1 - 10)
  • USB 2.0 Mass Storage Devices Design Platform
    • The USB 2.0 Mass Storage Design Platform is a complete, integrated solution, dedicated to a wide range of USB-based Mass Storage Devices.
    • You can use it in various applications, like portable flash memory, digital audio player, card reader or digital camera.
  • USB 2.0 Human Interface Devices Design Platform
    • The USB 2.0 HID Design Platform is a complete, integrated solution, dedicated to a wide range of USB-based Human Interface Devices, like mouse, keyboard, and tablet.
  • USB 2.0 Audio Devices Design Platform
    • The USB 2.0 Audio Design Platform is a complete, integrated solution, dedicated to USB-based Audio Devices, like microphones and speakers. 
  • USB 2.0 OTG Dual Role Device (DRD) Controller
    • Compliant with OTG Supplement Rev. 1.0a
    • USB 2.0 Compliant
    • Supports 480 Mbit/s (HS), 12 Mbit/s (FS), and 1.5 Mbit/s (LS)
    • Supports Session Request Protocol (SRP) and Host Negotiation Protocol (HNP)
    Block Diagram -- USB 2.0 OTG Dual Role Device (DRD) Controller
  • USB 2.0 PHY IP core
    • Complies with USB specifications, rev. 2.0 and 1.1
    • Complies with UTMI+ specification, level 3, rev. 1.0
    • Supports 480Mb/s (HS), 12Mb/s (FS) and 1.5MB/s (LS) serial data transmission rates
    • Supports 8-bit unidirectional Parallel Interface Engine (PIE) bus for HS, FS and LS modes, and Serial Interface Engine (SIE) for FS and LS modes
    Block Diagram -- USB 2.0 PHY IP core
  • USB 2.0 OTG IP Core
    • High speed support: 480 Mbit/s
    • Full speed support: 12 Mbit/s
    • USB 2.0 Compliant
    • High/Full speed support using 8/16 bit UTMI/ULPI interface
    Block Diagram -- USB 2.0 OTG IP Core
  • USB 2.0 Hub IP Core
    • The USB 2.0 Hub IP core is a USB 2.0 specification compliant hub core that supports 480 Mbit/s in High Speed (HS) mode, 12 Mbit/s in Full Speed (FS) mode, and 1.5 Mbit/s in Low Speed (LS) mode.
    • The USB 2.0 Hub IP core consists of the Hub Controller, Hub Repeater, Transaction Translators, Routing Logic, and Downstream Ports.
    Block Diagram -- USB 2.0 Hub IP Core
  • USB 2.0 Host IP Core
    • The USB 2.0 Host IP is a USB 2.0 specification compliant host IP core with an optional AHB, PCI, or custom host interface.
    • The USB 2.0 Host IP supports 480 Mbit/s in High Speed (HS) mode. 12 Mbit/s in Full Speed (FS) mode, and 1.5 Mbit/s in Low Speed (LS) mode.
    Block Diagram -- USB 2.0 Host IP Core
  • USB 2.0 Device IP Core
    • High speed support: 480 Mbit/s
    • Full speed support: 12 Mbit/s
    • USB 2.0 Compliant
    • High/Full speed support using 8/16 bit UTMI/ULPI interface
    Block Diagram -- USB 2.0 Device IP Core
  • High Speed Inter-CHIP USB 2.0 PHY
    • High-Speed 480Mbps data rate only
    • Source-synchronous serial interface
    • No power consumed unless a transfer is in progress.
    • Maximum trace length of 10cm
    Block Diagram -- High Speed Inter-CHIP USB 2.0 PHY
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