Synopsys IP

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Compare 958 IP from 13 vendors (1 - 10)
  • High Speed Ethernet Quad 10G to 100G PCS
    • Compliant with the IEEE 802.3 standard
    • Configurable IP available in single or quad port for speeds from 1G to 100G
    • Designed to be used with Synopsys 100G Ethernet MAC IP for 100G Systems
    • Integration tested with the Synopsys 100G Ethernet MAC IP and Synopsys 56G Ethernet PHY IP
    Block Diagram -- High Speed Ethernet Quad 10G to 100G PCS
  • High Speed Ethernet Gen-2 Quad 100G PCS IP
    • Compliant with the IEEE 802.3 standard
    • Configurable IP available in single or quad port for speeds from 1G to 100G
    • Designed to be used with Synopsys 100G Ethernet MAC IP for 100G Systems
    • Integration tested with the Synopsys 100G Ethernet MAC IP and Synopsys 56G Ethernet PHY IP
    Block Diagram -- High Speed Ethernet Gen-2 Quad 100G PCS IP
  • High Speed Ethernet 4/2/1-Lane 100G PCS
    • Compliant with the IEEE 802.3 standard
    • Configurable IP available in single or quad port for speeds from 1G to 100G
    • Designed to be used with Synopsys 100G Ethernet MAC IP for 100G Systems
    • Integration tested with the Synopsys 100G Ethernet MAC IP and Synopsys 56G Ethernet PHY IP
    Block Diagram -- High Speed Ethernet 4/2/1-Lane 100G PCS
  • High Speed Ethernet 2/4/8-Lane 200G/400G PCS
    • Compliant with the IEEE 802.3bs standard
    • 400G PCS available in single, quad or octal port supporting multiple 100G/50G/25G/10G SerDes lanes
    • 200G PCS available in single or quad port supporting multiple 100G/50G/25G/10G SerDes lanes
    • Designed to be used with Synopsys 400G and 200G Ethernet MAC IP for 400G/200G Ethernet systems
    Block Diagram -- High Speed Ethernet 2/4/8-Lane 200G/400G PCS
  • High Speed Ether 2/4/8-Lane 200G/400G/800G PCS
    • Compliant with the IEEE 802.3 standard
    • Configurable IP available in single or octal port
    • Designed to be used with Synopsys 800G MAC IP for 800G Ethernet Systems
    • Includes RS-FEC functions
    Block Diagram -- High Speed Ether 2/4/8-Lane 200G/400G/800G PCS
  • High Speed Ethernet 200G/400G/800G MAC
    • Supports all required features of the IEEE 802.3bs specification
    • Supports IEEE-managed objects, IETF MIB-II and RMON for management applications
    • Application interface includes the Synopsys native interface 512-bit or 1024-bit FIFO for more than 200G operation
    • Designed to be used with Synopsys 100G/200G/400G/800G Ethernet PCS IP
    Block Diagram -- High Speed Ethernet 200G/400G/800G MAC
  • High Speed Ethernet 200G/400G MAC
    • Supports all required features of the IEEE 802.3bs specification
    • Supports IEEE-managed objects, IETF MIB-II and RMON for management applications
    • Application interface includes the Synopsys native interface 512-bit or 1024-bit FIFO for more than 200G operation
    • Designed to be used with Synopsys 100G/200G/400G/800G Ethernet PCS IP
    Block Diagram -- High Speed Ethernet 200G/400G MAC
  • High Speed Ethernet 100G MAC IP
    • Supports all required features of the IEEE 802.3bs specification
    • Supports IEEE-managed objects, IETF MIB-II and RMON for management applications
    • Application interface includes the Synopsys native interface 512-bit or 1024-bit FIFO for more than 200G operation
    • Designed to be used with Synopsys 100G/200G/400G/800G Ethernet PCS IP
    Block Diagram -- High Speed Ethernet 100G MAC IP
  • 112G PHY, TSMC N7 x4, North/South (vertical) poly orientation
    • Supports full-duplex 1.25 to 112Gbps data rates in several lane configurations
    • Enables 100G, 200G, 400G, 800G Ethernet interconnects for wired and optical network infrastructure
    • Supports IEEE 802.3ck and OIF standards electrical specifications
    • Meets the performance requirements of multi-die, co-packaged optics, near-packaged optics, chip-to-chip, chip-to-module, and backplane interconnects
    Block Diagram -- 112G PHY, TSMC N7 x4, North/South (vertical) poly orientation
  • 112G Ethernet PHY, TSMC N7 x4, North/South (vertical) poly orientation
    • Supports full-duplex 1.25 to 112Gbps data rates in several lane configurations
    • Enables 100G, 200G, 400G, 800G Ethernet interconnects for wired and optical network infrastructure
    • Supports IEEE 802.3ck and OIF standards electrical specifications
    • Meets the performance requirements of multi-die, co-packaged optics, near-packaged optics, chip-to-chip, chip-to-module, and backplane interconnects
    Block Diagram -- 112G Ethernet PHY, TSMC N7 x4, North/South (vertical) poly orientation
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