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Positioning IP

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Search (19)
Compare 19 IP from 14 vendors (1 - 10)
  • Signal processing IP core for LTE network assisted positioning and E911 indoor location accuracy standards
    • 3GPP Rel. 9 through 13 compliant
    • Optimized for commercial 16b DSP
    • <140 MIPS during PRS occasion (6RB)
    Block Diagram -- Signal processing IP core for LTE network assisted positioning and E911 indoor location accuracy standards
  • Verification IP for Soundwire
    • A comprehensive VIP solution portfolio for Soundwire 1.0 used by SoC and IP designers to ensure comprehensive verification and protocol and timing compliance. Soundwire-Xactor implements a complete set of models, protocol checkers and compliance test suites in 100% native SystemVerilog and UVM.
  • GPS IP
    • Low-power, high-accuracy GPS IP designed for precise positioning and navigation.
    Block Diagram -- GPS IP
  • MIPI SoundWire Verification IP
    • Full MIPI SoundWire Master, slave and Monitor functionality
    • Supports MIPI SoundWire version 1.2r08 Specifications
    • Supports Basic PHY and High PHY mode
    • Supports IO timing
    Block Diagram -- MIPI SoundWire Verification IP
  • MIPI SOUNDWIRE Synthesizable Transactor
    • Supports MIPI SoundWire version 1.2r08 Specifications
    • Supports full MIPI SoundWire Master,Slave functionality
    • Supports Basic PHY and High PHY mode
    • Supports IO timing
    Block Diagram -- MIPI SOUNDWIRE Synthesizable Transactor
  • MIPI SOUNDWIRE PSVIP
    • Supports MIPI SoundWire version 1.2r08 Specifications
    • Supports full MIPI SoundWire Master,Slave functionality
    • Supports Basic PHY and High PHY mode
    • Supports IO timing
    Block Diagram -- MIPI SOUNDWIRE PSVIP
  • OpenGL ES 2.0 3D graphics IP core for FPGAs and ASICs
    • D/AVE NX is the latest and most powerful addition to the D/AVE family of rendering cores.
    • It is the first IP to bring 3D graphics OpenGL ES 2.0 rendering (with some ES 3.0 / 3.1 extensions) to the FPGA and SoC world and – with offline-shader compilers – even into MCUs or low-end MPUs with small amounts of memory and bare-metal or RTOS operation systems.
    Block Diagram -- OpenGL ES 2.0 3D graphics IP core for FPGAs and ASICs
  • NB-IoT Based Cellular IoT Platform with GNSS support
    • The Ceva-Waves Dragonfly platform is a turnkey platform with optimized, low-power hardware IP and protocol software for implementing narrow-band IoT (NB-IoT) cellular modem SoCs.
    • Extensions provide support for GNSS such as GPS and BeiDou and for sensor-fusion applications.
    Block Diagram -- NB-IoT Based Cellular IoT Platform with GNSS support
  • Block Diagram -- GPS L1 baseband and navigation IP
  • UE-based OTDOA solution for low power position-aware applications and E911
    • Lowest power positioning solution for cellular networks – 6x lower power than any other UE-assisted production the market and 60x more power efficient than GNSS
    • Requires 50x less memory than alternative approaches
    • Most accurate cellular positioning available
    • Scalable to any category device
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Semiconductor IP