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NVMe 2.0 IP

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  • NVMe 2.0 Verification IP
    • Compliant with the NVMe 2, 1.4, 1.3, 1.2 specification.
    • Compliant with PCI Express Specifications 6.0 v0.7(64GT/s), 5.0 v1.0(32GT/s), 4.0 v1.0 (16GT/s), 3.0 (8GT/s), 2.0 (5GT/s) and 1.1 (2.5GT/s).
    • Compliant with PIPE Specification 6.0,5.1, 4.4.1.
    • NVMe on top of Low Power, CXS, CPI, CXL, CXL Security, PCIe Gen6/5/4/3 management
    Block Diagram -- NVMe 2.0 Verification IP
  • Verification IP for NVMe
    • Accelerated confidence in simulation-based verification of RTL designs with NVMe interfaces over PCIe or Fabric links
    Block Diagram -- Verification IP for NVMe
  • Simulation VIP for NVMe
    • Admin Command Set
    • Supports all of the mandatory Admin Command set, which defines the commands that can be submitted to the Admin Submission Queue
    • NVM Command Set
    • Supports all of the mandatory NVM command set, which is a specification-defined I/O command set used with an I/O queue pair
  • Inline cipher engine for PCIe, CXL, NVMe, 5G FlexE link integrity and data encryption (IDE) using AES GCM mode
    • The ICE-IP-63 (EIP-63) is a scalable high-performance, multi-channel cryptographic engine that offers AES-GCM operations as well as AES-CTR and GMAC on bulk data.
    • Its flexible data path is suitable to scale from 100 Gbps to 2.4 Tbps to provide a tailored engine with minimal area for your application.
    • The FIFO-like data interface makes it possible to perform frame processing for many different protocols, including MACsec, IPsec, and OTN security. 
    Block Diagram -- Inline cipher engine for PCIe, CXL, NVMe, 5G FlexE link integrity and data encryption (IDE) using AES GCM mode
  • PCIe 2.0 (Gen2) Standard Controller with AMBA bridge II
    • Supports all required features of the PCI Express 5.0 (32 GT/s), 4.0 (16 GT/s), 3.1 (8 GT/s), 2.1 (5 GT/s), 1.1 (2.5 GT/s) and PIPE (8-, 16- and 32-bit) specifications
    • Production-proven datapath support for 32b, 64b, 128b, 256b and 512b implementations
    • Fully compliant with the PCI-SIG Single-Root I/O Virtualization (SRIOV) specification
    • Application interfaces include the Synopsys native interface or the optional ARM® AMBA® 4 AXI and 3 AXI application interface (AMBA not available for Switch configurations)
    Block Diagram -- PCIe 2.0 (Gen2) Standard Controller with AMBA bridge II
  • PCIe 2.0 (Gen2) Standard Controller EP/RP/DM/SW 32-128 bits with AMBA bridge
    • Supports all required features of the PCI Express 5.0 (32 GT/s), 4.0 (16 GT/s), 3.1 (8 GT/s), 2.1 (5 GT/s), 1.1 (2.5 GT/s) and PIPE (8-, 16- and 32-bit) specifications
    • Production-proven datapath support for 32b, 64b, 128b, 256b and 512b implementations
    • Fully compliant with the PCI-SIG Single-Root I/O Virtualization (SRIOV) specification
    • Application interfaces include the Synopsys native interface or the optional ARM® AMBA® 4 AXI and 3 AXI application interface (AMBA not available for Switch configurations)
    Block Diagram -- PCIe 2.0 (Gen2) Standard Controller EP/RP/DM/SW 32-128 bits with AMBA bridge
  • PCIe 2.0 (Gen2) Standard Controller EP/RP/DM/SW 32-128 bits
    • Supports all required features of the PCI Express 5.0 (32 GT/s), 4.0 (16 GT/s), 3.1 (8 GT/s), 2.1 (5 GT/s), 1.1 (2.5 GT/s) and PIPE (8-, 16- and 32-bit) specifications
    • Production-proven datapath support for 32b, 64b, 128b, 256b and 512b implementations
    • Fully compliant with the PCI-SIG Single-Root I/O Virtualization (SRIOV) specification
    • Application interfaces include the Synopsys native interface or the optional ARM® AMBA® 4 AXI and 3 AXI application interface (AMBA not available for Switch configurations)
    Block Diagram -- PCIe 2.0 (Gen2) Standard Controller EP/RP/DM/SW 32-128 bits
  • PCIe 2.0 (Gen2) Premium Controller with AMBA bridge II
    • Supports all required features of the PCI Express 5.0 (32 GT/s), 4.0 (16 GT/s), 3.1 (8 GT/s), 2.1 (5 GT/s), 1.1 (2.5 GT/s) and PIPE (8-, 16- and 32-bit) specifications
    • Production-proven datapath support for 32b, 64b, 128b, 256b and 512b implementations
    • Fully compliant with the PCI-SIG Single-Root I/O Virtualization (SRIOV) specification
    • Application interfaces include the Synopsys native interface or the optional ARM® AMBA® 4 AXI and 3 AXI application interface (AMBA not available for Switch configurations)
    Block Diagram -- PCIe 2.0 (Gen2) Premium Controller with AMBA bridge II
  • PCIe 2.0 (Gen2) Premium Controller II
    • Supports all required features of the PCI Express 5.0 (32 GT/s), 4.0 (16 GT/s), 3.1 (8 GT/s), 2.1 (5 GT/s), 1.1 (2.5 GT/s) and PIPE (8-, 16- and 32-bit) specifications
    • Production-proven datapath support for 32b, 64b, 128b, 256b and 512b implementations
    • Fully compliant with the PCI-SIG Single-Root I/O Virtualization (SRIOV) specification
    • Application interfaces include the Synopsys native interface or the optional ARM® AMBA® 4 AXI and 3 AXI application interface (AMBA not available for Switch configurations)
    Block Diagram -- PCIe 2.0 (Gen2) Premium Controller II
  • PCIe 2.0 (Gen2) Premium Controller EP/RP/DM/SW 32-256 bits with AMBA bridge
    • Supports all required features of the PCI Express 5.0 (32 GT/s), 4.0 (16 GT/s), 3.1 (8 GT/s), 2.1 (5 GT/s), 1.1 (2.5 GT/s) and PIPE (8-, 16- and 32-bit) specifications
    • Production-proven datapath support for 32b, 64b, 128b, 256b and 512b implementations
    • Fully compliant with the PCI-SIG Single-Root I/O Virtualization (SRIOV) specification
    • Application interfaces include the Synopsys native interface or the optional ARM® AMBA® 4 AXI and 3 AXI application interface (AMBA not available for Switch configurations)
    Block Diagram -- PCIe 2.0 (Gen2) Premium Controller EP/RP/DM/SW 32-256 bits with AMBA bridge
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