Accelerated confidence in simulation-based verification of RTL designs with NVMe interfaces over PCIe or Fabric links
The Avery NVMe test environment solution provides comprehensive verification featuring an advanced UVM environment that incorporates constrained random traffic generation, robust packet, link, and physical layer controls and error injection, protocol checks and coverage, functional coverage, protocol analyz er-like features for debugging, and performance analysis metrics.
With the advanced capabilities of Avery VIP, you can work more efficiently, develop more complex tests, and work on more complex topologies, such as multi-path, multi-link solutions.
Avery compliance test suites offer effective core-through-chip-level tests, including those used in compliance workshops as well as extended tests devel oped by Avery to cover the specification features.
