NAND Flash Memory Controller IP
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23
IP
from 12 vendors
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10)
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NAND Flash Memory Controller with DMA
- ONFI 4.0 support
- BCH EDAC with up to 60 bits correction capacity per 1024 bytes chunks of data
- Randomization of memory data
- Basic timeout based SEFI detection and reporting
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Nand Flash Controller
- Simple streaming interface towards user logic for data read and write
- Commands supported towards NAND Flash Memory:
- ECC Logic: Hamming code used to correct 1-bit error and detect 2-bit errors
- Commands supported from user: Block Erase, Read, Program and Copy-Back Program
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NAND Flash Controller
- Universal Flash support across all vendors
- Support for high speed memories (up to 533MT/s)
- Single-level cell (SLC) and multi-level cell (MLC) boot operation
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NAND Flash Controller
- DMA-Master NAND Flash memory controller
- 8-bit NAND-Flash interface
- Hardware checksum calculation
- Several memory pages transfer per transaction
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Universal NandFlash Controller
- ONFI 5.X Compliant
- SLC / MLC / TLC
- SDR modes 0 to 5
- NVDDR modes 0 to 5
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ONFI 3.2 NAND Flash Controller
- - Compliant to ONFI revision 3.2 standard
- - Supports NV-DDR2 mode of operation supporting up to 200MHz
- - Supports NV-DDR mode of operation supporting up to 100MHz
- - Supports legacy Asynchronous devices operating from 10MHz to 50MHz
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NAND Flash Controller using Xilinx RX/TX Bit Slice
- ONFI 4.x Compliant
- SLC / MLC / TLC
- SDR modes 0 to 5