MRAM IP

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Compare 8 IP from 5 vendors (1 - 8)
  • MRAM Synthesizable Transactor
    • Supports all the MRAM commands as per the MR2A16A and MR0A08B specifications.
    • Supports Symmetrical high-speed read and write with fast access time.
    • Supports SRAM Compatible timing
    • Supports native non-volatility
    Block Diagram -- MRAM Synthesizable Transactor
  • MRAM Memory Model
    • Supports MRAM memory devices from all leading vendors.
    • Supports 100% of MRAM protocol standard.
    • Supports all the MRAM commands as per the MR2A16A and MR0A08B specifications
    • Supports Symmetrical high-speed read and write with fast access time.
    Block Diagram -- MRAM Memory Model
  • Power and Clock Generation IP - GLOBALFOUNDRIES® 22FDX®
    • Tightly integrated power management platform with a soft-IP wrapper around Analog / Mixed-Signal hard macros which generate all supply voltages and clock signals needed to run highly efficient SoCs in GlobalFoundries® 22FDX®.
    • Running from only one supply voltage and reference clock, the IP generates its own internal supplies and references, and those needed to run the Racyics® ABX® Generator.
    Block Diagram -- Power and Clock Generation IP - GLOBALFOUNDRIES® 22FDX®
  • SmartMem Subsystem IP
    • Fully synthesizable and configurable memory subsystem IP that enables significant improvement in power, performance and endurance not only for NuRAM but also other third party MRAMs as well as RRAM, PCRAM and Flash
    Block Diagram -- SmartMem Subsystem IP
  • Low Power Memory IP
    • State-of-the-art, patented memory technology based on industry proven MRAM.
    • Fast access times and extremely low leakage power make it an attractive upgrade to traditional SRAM or nvRAM as well as embedded Flash.
    Block Diagram -- Low Power Memory IP
  • DDR4 / DDR3/ DDR3L / LPDDR4 Memory Controller IP optimized for low latency
    • Support DDR3 / DDR3L / DDR4/ 3DS DDR4/ LPDDR4 / MRAM
    • Support x8/x16/x32 DRAM data bus configuration (programmable)
    • Support Multi-Ranks DRAM configuration
    • DDR base on DFI spec 4.0 compliant.
    Block Diagram -- DDR4 / DDR3/ DDR3L / LPDDR4  Memory Controller IP optimized for low latency
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Semiconductor IP