MLI IP
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3
IP
from 2 vendors
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3)
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Reed Solomon Encoder IP Core
- Supports different Reed-Solomon coding standards
- Code rate can be dynamically varied
- Parameterizable bits per symbol (M)
- Programmable codeword length (NVAL) with parameterizable maximum value (N)
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TSMC CLN5FF GLink 2.0 Die-to-Die PHY
- 32 full-duplex lanes per slice
- 8 slices are included in the analog hard macro
- 1:8 mode with 256-bit data width or 1:16 mode with 512-bit data width for user interface
- VALID and READY handshake mechanism
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TSMC CLN5FF GLink 2.3LL Die-to-Die PHY
- 56 full-duplex lanes per slice
- 8 slices are included in the analog hard macro
- 1:8 mode with 448-bit data width or 1:16 mode with 963-bit data width for user interface
- VALID and READY handshake mechanism