HyperBus controller IP
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4
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6)
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Hyperbus Flash Memory Controller
- Compatible with spansion hyperbus based memory products.
- 0 Wait State Write Burst Operation for HyperBus memory on AXI interface of up to 256 words.
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xSPI Multiple Bus Memory Controller
- SLL’s unified xSPI Multiple Bus Memory Controller IP supports the widest range of JEDEC xSPI and xSPI-like NOR Flash and PSRAM memories (JEDEC xSPI Profile 1.0 and 2.0, HyperBus 1.0, 2.0 and 3.0, OctaBus and Xccela Bus) that are available now from many memory vendors.
- JEDEC xSPI and xSPI-like memories offer good performance with lower hardware and power costs. Memory device variants offer up to 512 Mbit PSRAM, up to 2 Gigabit NOR Flash, up to 250 MHz DDR clock speeds, with x4, x8 and x16 data path widths, and a wide range of package options including 4mm x 4mm BGA49 and tiny WLCSP footprints. Some PRSAM devices are now also available with internal ECC.
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Winbond HyperRAM Controller
- The HyperRAM controller supports Winbond’s HyperBus based HyperRAM devices
- This controller enables smooth integration of Winbond’s HyperBus HyperRAM memory chips into various new-gen SoCs’.
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Serial Flash Controller IIP
- Compliant with Flash Devices from major Flash Device Vendors.
- Full Flash with SPI Master Functionality.
- Supports 3 modes of operation
- Slave Mode - Accessing flash device through CSR registers from SOC Slave interface
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Simulation VIP for HyperRam
- Density
- From 64Mb to 128Mb
- Reset
- Hardware Reset via RESET# pin
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Simulation VIP for HyperFlash
- Density
- From 128Mb to 512Mb
- General Functionality
- Supports Status Register Read and Clear commands
