HiGig MAC IP

Filter
Filter
Compare 6 IP from 3 vendors (1 - 6)
  • HiGig Ethernet MAC
    • Compliant to the Broadcom HiGig and HiGig2 Protocol Definitions
    • 64-bit wide internal data path operating at a maximum frequency of 187.5 MHz (LatticeECP3 maximum 156 MHz)
    • XGMII interface to the PHY layer (using IODDR external to the core)
    • XAUI interface to the PHY layer (using PCS/SERDES external to the core)
    Block Diagram -- HiGig Ethernet MAC
  • ETHERNET 10G MAC IP
    • Compliant with IEEE Standard 802.3-2018 specification
    • Supports full duplex mode of operation
    • Supports Standard 10Gbps Ethernet link layer data
    • Supports XGMII interface operating at 156.23MHz
  • 10G-1.6T Ethernet/FiberChannel/FlexO Core
    • PCS layer formed by bonded 2x 400GE PCS in PCS Layer
    • Using 32 virtual logical lanes based on 2 x 400GE PCS to reduce power in 800G operation
    Block Diagram -- 10G-1.6T Ethernet/FiberChannel/FlexO Core
  • 1G-100G Ethernet/FiberChannel/FlexO Core
    • Support any ethernet combinations (table 1) to maximum data-rate of the device
    • Fully compatible with IEEE802.3 2015 and IEEE 802.3 Standards
    Block Diagram -- 1G-100G Ethernet/FiberChannel/FlexO Core
  • 10G-800G Ethernet/FiberChannel/FlexO Core
    • Combines Ethernet streams at a variety of rates to a single multi-channel interface at the MAC
    Block Diagram -- 10G-800G Ethernet/FiberChannel/FlexO Core
  • 10G-400G Ethernet/FiberChannel/FlexO Core
    • Flexible FlexE 2.1/2.0/1.1/ 1.0 core performs mapping and rate adaptation between different channels to a single interface from the multi-channel MAC
    Block Diagram -- 10G-400G Ethernet/FiberChannel/FlexO Core
×
Semiconductor IP