HDMI CEC IP

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Compare 45 IP from 7 vendors (1 - 10)
  • HDMI CEC IIP
    • Supports HDMI-CEC version 1.4b and 2.0 specifications
    • CEC 2.0 is designed to be a backward compatible extension of CEC 1.4b
    • HDMI-CEC device supports full Initiator and Follower functionality.
    • Supports automatic synchronization to align sampling point.
    Block Diagram -- HDMI CEC IIP
  • 1.8V/3.3V GPIO Library with HDMI, Aanlog & LVDS Cells in TSMC 22nm
    • A TSMC 22nm Inline, Flip Chip compatible library with GPIO, ODIO, HDMI, LVDS, & Analog Cells.
    • This silicon-proven, flip chip compatible library in TSMC 22nm boasts a two speed GPIO: 75MHz and 150MHz.
    • The library also features a 5V ODIO. GPIO and ODIO cells have an orientation of NS and EW.
    Block Diagram -- 1.8V/3.3V GPIO Library with HDMI, Aanlog & LVDS Cells in TSMC 22nm
  • Simulation VIP for HDMI
    • 3D – Capability
    • Supports various 3D video frame formats
    • 4K x 2K Resolution
    • Supports 4Kx2K video frame formats
    Block Diagram -- Simulation VIP for HDMI
  • HDMI 2.0/MHL RX Combo 1P PHY 6Gbps in TSMC 28nm HPC 1.8V, North/South Poly Orientation
    • Support for key HDMI 2.0 features such as 4K x 2K resolution at 60 Hz frame rate, YCbCr 4:2:0 pixel encoding format, TMDS scrambling, High Dynamic Range (HDR), CEC 2.0 and 18.0 Gbps aggregate bandwidth
    • Compliant with HDMI 2.0 and HDCP 2.3, 1.2 specification
    • Optimized for low power and small area
    • Integrated audio return channel (ARC) block
    Block Diagram -- HDMI 2.0/MHL RX Combo 1P PHY 6Gbps in TSMC 28nm HPC 1.8V, North/South Poly Orientation
  • HDMI 2.0 RX PHY in SS 8LPP 1.8V, North/South Poly Orientation
    • Support for key HDMI 2.0 features such as 4K x 2K resolution at 60 Hz frame rate, YCbCr 4:2:0 pixel encoding format, TMDS scrambling, High Dynamic Range (HDR), CEC 2.0 and 18.0 Gbps aggregate bandwidth
    • Compliant with HDMI 2.0 and HDCP 2.3, 1.2 specification
    • Optimized for low power and small area
    • Integrated audio return channel (ARC) block
    Block Diagram -- HDMI 2.0 RX PHY in SS 8LPP 1.8V, North/South Poly Orientation
  • HDMI 2.0 RX Controller with HDCP
    • Support for key HDMI 2.0 features such as 4K x 2K resolution at 60 Hz frame rate, YCbCr 4:2:0 pixel encoding format, TMDS scrambling, High Dynamic Range (HDR), CEC 2.0 and 18.0 Gbps aggregate bandwidth
    • Compliant with HDMI 2.0 and HDCP 2.3, 1.2 specification
    • Optimized for low power and small area
    • Integrated audio return channel (ARC) block
    Block Diagram -- HDMI 2.0 RX Controller with HDCP
  • HDMI 2.0 RX 4P PHY 6Gbps in TSMC 28nm HPM 1.8V, North/South Poly Orientation
    • Support for key HDMI 2.0 features such as 4K x 2K resolution at 60 Hz frame rate, YCbCr 4:2:0 pixel encoding format, TMDS scrambling, High Dynamic Range (HDR), CEC 2.0 and 18.0 Gbps aggregate bandwidth
    • Compliant with HDMI 2.0 and HDCP 2.3, 1.2 specification
    • Optimized for low power and small area
    • Integrated audio return channel (ARC) block
    Block Diagram -- HDMI 2.0 RX 4P PHY 6Gbps in TSMC 28nm HPM 1.8V, North/South Poly Orientation
  • HDMI 2.0 RX 4P PHY 6Gbps in TSMC 28nm HPCP 1.8V, North/South Poly Orientation
    • Support for key HDMI 2.0 features such as 4K x 2K resolution at 60 Hz frame rate, YCbCr 4:2:0 pixel encoding format, TMDS scrambling, High Dynamic Range (HDR), CEC 2.0 and 18.0 Gbps aggregate bandwidth
    • Compliant with HDMI 2.0 and HDCP 2.3, 1.2 specification
    • Optimized for low power and small area
    • Integrated audio return channel (ARC) block
    Block Diagram -- HDMI 2.0 RX 4P PHY 6Gbps in TSMC 28nm HPCP 1.8V, North/South Poly Orientation
  • HDMI 2.0 RX 4P PHY 6Gbps in TSMC 28nm HPC 1.8V, North/South Poly Orientation
    • Support for key HDMI 2.0 features such as 4K x 2K resolution at 60 Hz frame rate, YCbCr 4:2:0 pixel encoding format, TMDS scrambling, High Dynamic Range (HDR), CEC 2.0 and 18.0 Gbps aggregate bandwidth
    • Compliant with HDMI 2.0 and HDCP 2.3, 1.2 specification
    • Optimized for low power and small area
    • Integrated audio return channel (ARC) block
    Block Diagram -- HDMI 2.0 RX 4P PHY 6Gbps in TSMC 28nm HPC 1.8V, North/South Poly Orientation
  • HDMI 2.0 RX 4P PHY 6Gbps in GF 28nm SLP 1.8V, East/West Poly Orientation
    • Support for key HDMI 2.0 features such as 4K x 2K resolution at 60 Hz frame rate, YCbCr 4:2:0 pixel encoding format, TMDS scrambling, High Dynamic Range (HDR), CEC 2.0 and 18.0 Gbps aggregate bandwidth
    • Compliant with HDMI 2.0 and HDCP 2.3, 1.2 specification
    • Optimized for low power and small area
    • Integrated audio return channel (ARC) block
    Block Diagram -- HDMI 2.0 RX 4P PHY 6Gbps in GF 28nm SLP 1.8V, East/West Poly Orientation
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Semiconductor IP