HDLC/SDLC IP

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Compare 2 IP from 2 vendors (1 - 2)
  • HDLC/SDLC controller
    • Two separate receiver and transmitter interfaces.
    • Two separate, configurable FIFO buffers for receiver and transmitter
    • Bit stuffing and unstuffing
    • Address recognition for receiver and address insertion for transmitter
  • Used for controlling HDLC/SDLC transmission protocols
    • Two separate receiver and transmitter interfaces.
    • Two separate, configurable FIFO buffers for receiver and transmitter
    • Bit stuffing and unstuffing
    • Address recognition for receiver and address insertion for transmitter
    Block Diagram -- Used for controlling HDLC/SDLC transmission protocols
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Semiconductor IP