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Graphics Accelerator IP

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Compare 16 IP from 8 vendors (1 - 10)
  • Scalable 3D Graphics Accelerator
    • Graphics accelerator IP core designed to support the OpenGL® ES 1.1 API*
    • Supports Xilinx® Zynq-7000 Ap SoC, 7 Series, Spartan®-6 and Virtex®-6
    • Conformant to the ARM® AMBA® AXI4 bus
    • FPGA resource-effective 3D acceleration
  • 2D/3D Vector Graphics Accelerator / GPU (Graphics Processing Unit)
    • D/AVE HD is an evolution in the D/AVE family supporting high quality 2D rendering and basic 3D rendering for displays up to 4K x 4K. With its high customizability D/AVE HD targets modern graphics applications in the Industrial, Medical, Military, Avionics, Automotive and Consumer markets. D/AVE HD is designed to be fast with powerful functionality and at the same time optimized regarding size and footprint. Its footprint optimized variants are especially suitable for low-power wearable products.
  • 2D Vector Graphics Accelerator / GPU (Graphics Processing Unit)
    • Vertically integrated HW + SW solution
    • Monolithique HW building block, open to any system integration. Can be associated with any companion IP:
    • 2 hardware versions:
    • Software ported on numerous processors and OS
  • Bitmap 2.5D Graphics Accelerator
    • Supports fast graphics operations with bitmaps
    • 2.5D option enables perspective correct texture rendering in 3D
    • Solid fill - Rectangle or Triangle rendering with any color
    • Fully embedded into Xilinx® XPS and the EDK
  • Image warping IP core
    • Resolution: Up to 2048x2048
    • Color format: RGB/YUV for inputs, RGB for outputs
    • Functions: Image warping (into/from any shape), mag/min, rotating
    • Performance: 30fps and up
  • 2D Graphics Hardware Accelerator (AXI4 Bus)
    • Bit Block Transfer - 3 Independent Memory Sources of data
    • .2D Raster Operations (ROP) performed on Block Transfers
    Block Diagram -- 2D Graphics Hardware Accelerator (AXI4 Bus)
  • BitBLT Graphics Hardware Accelerator (AHB Bus)
    • Bit Block Transfer – 3 Independent Memory Sources of data:
    • 2D Raster Operations (ROP) performed on Block Transfers:
    • BitBLT Draw Features:
    • 2D Graphics Rendering Engine (Option):
    Block Diagram -- BitBLT Graphics Hardware Accelerator (AHB Bus)
  • BitBLT Graphics Hardware Accelerator (AXI Bus)
    • Bit Block Transfer – 3 Independent Memory Sources of data:
    • 2D Raster Operations (ROP) performed on Block Transfers:
    • BitBLT Draw Features:
    • 2D Graphics Rendering Engine (Option):
    Block Diagram -- BitBLT Graphics Hardware Accelerator (AXI Bus)
  • BitBLT Graphics Hardware Accelerator (AXI4 Bus)
    • Bit Block Transfer – 3 Independent Memory Sources of data:
    • 2D Raster Operations (ROP) performed on Block Transfers:
    • BitBLT Draw Features:
    • 2D Graphics Rendering Engine (Option):
    Block Diagram -- BitBLT Graphics Hardware Accelerator (AXI4 Bus)
  • MIPI UniPro Stack - v1.6
    • MIPI UniPro Compliant
    • Type I for M-PHY
    • MIPI M-PHY Version 3.0
    • Multi-lane: one to four
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