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Flex Logix IP

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  • Multi Channel DMA Flex IP Core for PCI-Express
    • AXI standard interfaces for easy integration
    • User transmits/receives only user data without PCIe protocol
    • All AXI Interfaces have adjustable Datawidth and separate clocking
    Block Diagram -- Multi Channel DMA Flex IP Core for PCI-Express
  • USART Verification IP
    • Fully compatible with ds8251.
    • Transmit and receive commands allow the user to transmit and receive USART data.
    • Configurable Baud rate.
    • Programmable word length, stop bits, and parity
    Block Diagram -- USART Verification IP
  • PCIe Multifunction IP Core for Intel FPGAs
    • Utilizes the Intel PCIe HIP block with up to 8
    • physical PCIe functions.
    • • Designs provides up to 8 AXI masters which
    • can be freely mapped to the PCIe functions
    Block Diagram -- PCIe Multifunction IP Core for Intel FPGAs
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