Ethernet IP
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991
IP
from 98 vendors
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10)
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1G/40G/100G/200G/800G Ethernet Controller - Enables accurate validation of Ethernet protocols across speeds
- XtremeSilica’s Ethernet Controllers support 1G to 800G speeds, ensuring accurate simulation and validation of Ethernet protocols for high-speed networks. With IEEE compliance, advanced features like QoS, VLAN, and error injection, they optimize performance for Ethernet-based SoC designs.
- These controllers excel in diverse applications, including data centers, telecommunications, cloud computing, HPC, automotive Ethernet, and industrial automation. They provide seamless integration, high throughput, low latency, and robust networking for modern systems across industries.
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Simulation VIP for Ethernet up to 800G
- 800Gbps Interfaces
- 800Gbps Ethernet interfaces based on Ethernet Technology Consortium supports:
- 800GMII
- 800GBase-R Dual-PCS 32 lanes (25Gb/s)
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Simulation VIP for Ethernet TSN
- IEEE P802.1AS-2011
- Transmissions: PTP over Ethernet, PTP over IPoE
- Clock synchronization between different time-aware systems
- Best Master Clock Algorithm
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Simulation VIP for Ethernet FlexE
- OIF FLEXE-02.1(2019)
- Channelization/Bonding/Sub-Rating/Hybrid
- Multiple 50G/100G/200G/400G BaseR PHY
- FlexE clients of 5G, 10G, 25G, 40G, 50G, 100G, 200G, and 400G speeds
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Simulation VIP for Ethernet Base-T1
- 10 Base-T1s Interface
- Based on IEEE 802.3cg-2019 (Clause 147)
- 4b/5b Encoder/Decoder
- 17bit self-synchronizing scrambler/descrambler
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Simulation VIP for Ethernet 5G Network
- SyncE
- Supports clock generation from transmit side
- Supports Hold-off and Wait-to-restore feature
- Support for 25G speed with serial interface
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PCIe Express Gen4 / Ethernet SERDES on TSMC CLN5A
- Industry leading low power PMA macro – 122.9mW per lane at 16Gbps (7.7mW/Gbps) inclusive of Tx and Rx PLLs, termination, bias, etc.
- Support for Ethernet protocols and Automotive Grade 2
- Compact form factor – 0.34 mm2 active silicon area per lane including ESD
- Minimal latency – 3 UI between parallel transfer and serial transmission
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PCI Express Gen4 / Ethernet SERDES on TSMC CLN5
- Industry leading low power PMA macro – 122.9mW per lane at 16Gbps (7.7mW/Gbps) inclusive of Tx and Rx PLLs, termination, bias, etc.
- Support for Ethernet protocols and Automotive Grade 2
- Compact form factor – 0.34 mm2 active silicon area per lane including ESD
- Minimal latency – 3 UI between parallel transfer and serial transmission
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XLGMII 40G Ethernet Verification IP
- Follows XLGMII specification as defined in IEEE 802.3ba
- Supports all types of XLGMII TX and RX errors insertion/detection
- Oversize, undersize, inrange, out of range Packet size errors
- Missing SPD/EPD/SFD framing errors
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10G XAUI/10GBase-KX4 Ethernet Verification IP
- Follows 10G XAUI specification as defined in IEEE 802.3
- Follows 10Gbase-KX4 specification as defined in IEEE 802.3
- Supports backplane auto-negotation for 10GBASE-KX4
- Supports all types of 10G XAUI/10GBase-KX4 TX and RX errors insertion/detection.