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DVB-S2 IP

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Compare 46 IP from 13 vendors (1 - 10)
  • DVB-S2 LDPC BCH Decoder and Encoder
    • Irregular parity check matrix
    • Layered Decoding
    • Minimum sum algorithm
    • Soft decision decoding
  • DVB-S2 Modulator
    • Fully synchronous design, using single clock
    • Fully synthesizable drop-in module for FPGAs
    • Optimized for high performance and low resources
    • Low implementation loss
  • DVB-S2 Demodulator
    • Compliant with ETSI 302 307 V1.2.1 (2009-08) (DVB-S2)
    • Supports CCM mode for broadcasting. ACM and VCM modes will be available soon
    • Support for QPSK and 8-PSK modulations. 16-APSK and 32-APSK will be available soon
    • Support for short blocks (16200 bits) and long blocks (64800 bits)
  • LDPC Decoder and Encoder that supports DVB-S2 DVB-S2X DVB-T2 DVB-C2 CMMB DMB-T
    • LDPC decoder and encoder that supports several standards:
    • Versions available for different throughput, up to several Gbps.
    • Unique architecture assures easy place and rout.
  • DVB-S2 BCH and LDPC Encoder and Decoder
    • Compliant with ETSI 302 307 V1.2.1 (2009-08) (DVB-S2).
    • Support for short blocks (16200 bits) and long blocks (64800 bits).
    • Support for all modulation schemes (QPSK, 8-PSK, 16-APSK, 32-APSK).
    • Support for all interleaving schemes of all modulation schemes.
  • DVB-S2 Modulator
    • ASI interface for incoming TS-packets
    • Supports QPSK, 8PSK, 16APSK & 32APSK modulation
    • Supports VCM operation
    • Normal and short frame sizes
  • DVB-S2 Demodulator
    • Excellent performance
    • Supports QPSK, 8PSK, 16APSK & 32APSK modulations
    • Supports VCM operation
    • Normal and short frame sizes
  • Multistream DVB-S2 Modulator
    • Aggregation of up to 8 input streams
    • Complete user control to choose any number of streams
    • Each stream independently configurable
    • DVB-S2 CCM and VCM operations
    Block Diagram -- Multistream DVB-S2 Modulator
  • DVB-S2 modulator
    • Support for CCM, VCM and ACM modes.
    • Variable sample-rate interpolation provides ultra flexible clocking strategy.
    • Compatible with Broadcast, DSNG, Interactive and Professional DVB-S2 profiles.
    • QPSK, 8PSK, 16APSK, 32APSK support.
  • LDPC for 5G DVBS2 802.11
    • High throughput
    • One encoder and decoder per matrix
    • Five cycles per iteration may increase to around 10 for timing between gates.
    • Has configuration parameters for stopping if code is diverging.
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