DMA Engine IP
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134
IP
from 49 vendors
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10)
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Lancero Scatter-Gather DMA Engine for PCI Express
- PCIe I/O performance: 200 MB/s x1 Gen 1 up to 3360 MB/s x8 Gen 2
- Easily connect logic and high-speed I/O peripherals to PCI Express
- Target Bridge supports Avalon Memory Mapped custom logic
- SGDMA Engine supports Avalon Streaming burst access devices
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PCIe Controller for USB4 Hosts and Devices supporting PCIe Tunneling, with optional built-in DMA and configurable AMBA AXI interface
- Designed to the USB4 Specification v1.0
- Follows PCIe 1.0 protocol, but can operate at any compatible speed
- Supports the PCI-SIG Single-Root I/O Virtualization (SR-IOV) Specification
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AXI4 to/from Stream DMA
- Independent stream-to-memory, and memory-to-stream paths
- Up to 16 commands per direction with 32-bit or 64-bit address offset and 16-bit transfer length
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AXI4 to/from AXI4-Stream Scatter-Gather DMA
- AXI4 Memory Mapped to Stream & Stream to Memory Mapped DMA
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HASH Core, providing MD5, SHA1 and SHA256. Includes DMA and AXI Interface
- Supports MD5, SHA1 and SHA256
- High Performance S/G DMA engine
- Fully AXI-4 compatible
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PCIe 1.1 Controller supporting Root Port, Endpoint, Dual-mode Configurations, with Built-in DMA and Configurable AMBA AXI Interconnect
- PCIe Interface
- Supported silicon:
- AMBA AXI Interface
- Data Engine and Address translation for PCIe-to-AXI and AXI-to-PCIe transfers
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PCIe 2.1 Controller supporting Root Port, Endpoint, Dual-mode Configurations, with Built-in DMA and Configurable AMBA AXI Interconnect
- PCIe Interface
- Supported silicon:
- AMBA AXI Interface
- Data Engine and Address translation for PCIe-to-AXI and AXI-to-PCIe transfers
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USB 2.0 OTG High / Full / Low- Speed Dual Role IP Core
- Support SW controlled host/device role switching.
- Support Fullspeed and Lowspeed
- Support Control, Bulk, Interrupt and Isochronous Transfer Types
- Support L1/L2 power saving modes for USB 2.0 port
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Highly configurable high-speed serial link controller
- SpaceFibre codec designed according to the SpaceFibre specification ECSS-E-ST-50-11C, single-lane implementation
- WizardLink codec designed to interface with Texas Instrument TLK2711 transceiver
- The IP can inter-operate with off-chip SerDes devices or with FPGA/ASIC hard macros
- Optional 8b10b encoding
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CAN FD controller
- Compatible with both CAN 2.0B and CAN-FD
- Fully compliant with ISO 11898-1:2015
