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DC DC regulator IP

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Search (19)
Compare 19 IP from 11 vendors (1 - 10)
  • Linear Regulator, ultra low quiescent current for retention mode TSMC 40uLPeF
    • qLR-Aubrey-ref-1.62-3.63-0.55-2.5.02_TSMC_40_uLPeF is an ultra-low quiescent LDO (Linear regulator) in TSMC 40uLPeF.
    Block Diagram -- Linear Regulator, ultra low quiescent current for retention mode TSMC 40uLPeF
  • Low input voltage high performance LDO regulator in TSMC 22ULL
    • LDO-T22-1-1.8-0.6-1.05_TSMC_22_ULL is a Low input voltage, high performance LDO linear regulator in TSMC 22ULL with programmable output voltage to supply core logic domains, SRAM arrays or RF/analog domains.
    • It features normal and low-power (LP) operating modes to adjust the amount of output current depending on the application requirements.
    Block Diagram -- Low input voltage high performance LDO regulator in TSMC 22ULL
  • LDO regulator on SMIC 40nm, 1.13v output
    • The present IP is a low dropout voltage regulator, which can support 10uA DC current load
    • The input voltage is 2.7-3.6V (typical: 3.3V)
    • Its output voltage range is 0.62V-1.13V-1.75V
    • The reference voltage and bias current are 0.6V and 0.5uA from BGR, respectively.
  • LDO regulator on SMIC 40nm, 1.42v output
    • The present IP is a low dropout voltage regulator, which can support 10uA DC current load
    • The input voltage is 2.7-3.6V (typical: 3.3V)
    • Its output voltage range is 0.9V-1.42 V-2.1V
    • The reference voltage and bias current are 0.6V and 0.5uA from BGR, respectively.
  • Capless Analog LDO Regulator
    • Output current range is 0-15mA.
    • Short Circuit Current Limiting and Overtemperature Protection
    • Shutdown current< 312nA .
    • DC load regulation< 0.99%
    Block Diagram -- Capless Analog LDO Regulator
  • 50mA capacitor-less LDO voltage regulator (output voltage 0.5V to 0.8V)
    • GF 22nm FDX
    • 0.72V – 1.2V input voltage range
    • Programmable output voltage from 0.5 to 0.8V
    • Normal and LP modes
    Block Diagram -- 50mA capacitor-less LDO voltage regulator (output voltage 0.5V to 0.8V)
  • Low Power Regulator
    • The agileLDO_LP is a linear regulator, suitable for use in any low power, low current system and is designed to provide a flexible range of regulated output voltages suitable for ultra-low power systems and near-vt operating modes.
    • The agileLDO_LP consists of: A voltage reference generator, an error amplifier and a output current source. The regulated output voltage is fed-back into the error amplifier to maintain a constant regulated output over the specified range of input voltages and load currents.
    Block Diagram -- Low Power Regulator
  • 16mA 4V Voltage Regulator
    • The TS_VR_4V00_X8 is a 4V voltage regulator capable of delivering up to 16mA. It is required for the supply of other TES IPs like TS_FS_9M70_X8,
    • TS_VA_LNDC_X8, and TS_CS_20uA_X8. The TS_VR_4V00_X8 operates with one supply voltage, VDDA5, VDDIO (5V typical) and one precision reference voltage VREF (2.5V).
    Block Diagram -- 16mA 4V Voltage Regulator
  • Low Drop-Out Linear Regulator
    • The agileLDO is a linear Low Drop-Out voltage regulator (LDO) providing precision and programmable voltage regulation.
    • The regulator architecture provides a high dynamic performance making it suitable for demanding digital applications.
    • Whilst the low noise and high PSRR lends itself to powering noise-sensitive analog circuits.
    Block Diagram -- Low Drop-Out Linear Regulator
  • 75mA Core Voltage Regulator
    • Input voltage range 3.0V – 3.3V.
    • Output voltage 1.2V or 1.8V ±4%.
    • Output short circuit protection.
    • Bundled with Obsidian 1.2V bandgap reference.
    • Power down/enable input.
    • Fast response to current steps.
    Block Diagram -- 75mA Core Voltage Regulator
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