Linear Regulator, ultra low quiescent current for retention mode TSMC 40uLPeF

Overview

qLR-Aubrey-ref-1.62-3.63-0.55-2.5.02_TSMC_40_uLPeF is an ultra-low quiescent LDO (Linear regulator) in TSMC 40uLPeF.

PARAMETERS CONDITION

Minimum value

Typical value

Maximum value

Input Voltage

- 1.62 V   3.63 V

Output Voltage

- 0.55 V   2.5 V

Output current configuration

- - 1 mA -

Key Features

  • 10 % DC output voltage accuracy.
  • - 20 dB PSRR.
  • 1 mA maximum load current.
  • 140 nA quiescent current (no load)

Benefits

  • Very low quiescent and leakage for Low-Power
  • Retention capability enables optimization of the power consumption depending on the modes and needs of the SoC
  • Can supply always-on very low loads
  • Low Bill-of-Material: supports external capacitor if required by the system

Block Diagram

Linear Regulator, ultra low quiescent current for retention mode TSMC 40uLPeF Block Diagram

Applications

  • AR - VR
  • Bluetooth
  • Cellular IoT
  • GNSS
  • Hearing aids
  • Home Appliance
  • Infotainment
  • NB-IoT
  • Smart Headset
  • Smart Speaker
  • TWS Earpods
  • ULP MCU
  • Voice-controlled devices
  • Voice Assistant
  • WiFi

Technical Specifications

Short description
Linear Regulator, ultra low quiescent current for retention mode TSMC 40uLPeF
Vendor
Vendor Name
Foundry, Node
TSMC 40uLPeF
TSMC
Pre-Silicon: 40nm LP
×
Semiconductor IP