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CANsec IP

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  • CAN-SEC Bus Controller IP
    • The CAN-SEC Acceleration Engine Core implements the CAN-XL Protocol (CiA 610-1), CAN-XL Addon Part 1-Simple/Extercontent Indication (CiA 613-1), and CAN-XL Addon Part 2-Security (CiA 613- 2) Protocols.
    • The CAN-SEC Acceleration Engine core is easy to integrate with the Host processor using AMBA-APB, AHB_Lite or AMBA-AXI standard interface.
    Block Diagram -- CAN-SEC Bus Controller IP
  • CANsec Acceleration Engine
    • The CAN-SEC IP core implements a hardware accelerator for the CANsec extension of the CAN-XL protocol, as defined in CiA’s 613-2 specification.
    • The CANsec specification provisions two ciphers with key lengths of 128, 192, or 256 bits to protect CAN XL frames’ payload, all of which are supported by the hardware accelerator.
    Block Diagram -- CANsec Acceleration Engine
  • CAN CC, CAN FD, and CAN XL Bus Controller
    • The CAN-CTRL implements a highly featured and reliable CAN bus controller that performs serial communication according to the Controller Area Network (CAN) protocol.
    • It supports classical CAN and CAN FD  according to ISO 11898-1:2015; CAN XL as specified in CiA 610-1 specification; Time-Triggered CAN (TTCAN) per ISO 11898-4; and CAN Frame time-stamping as described in the CiA 603 profile.
    • This CAN controller core handles data rates exceeding 20Mbit/s and it is optimized for the AUTOSAR and SAE J1939 specifications.
    Block Diagram -- CAN CC, CAN FD, and CAN XL Bus Controller
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