Automotive PHY IP
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475
IP
from 38 vendors
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10)
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100BASE-T1 Automotive Ethernet PHY on Globalfoundries 22FDX
- IEEE Std 802.3bw™-2015 compliant automotive Ethernet PHY IP
- Fully integrated PHY IP including AFE, PLL, power regulators and ESD protection
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LPDDR5/4/4X PHY - TSMC N7 for Automotive, ASIL B Random, AEC-Q100 Grade 2
- Supports JEDEC standard LPDDR5X, LPDDR5, LPDDR4 and LPDDR4X SDRAMs
- Support for data rates up to 6400 Mbps
- Designed for rapid integration with Synopsys’ LPDDR5/4/4X controller for a complete DDR interface solution
- DFI 5.0 controller interface
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LPDDR5/4/4X PHY - SS 14LPU for Automotive AEC-Q100 Grade 1
- Supports JEDEC standard LPDDR5X, LPDDR5, LPDDR4 and LPDDR4X SDRAMs
- Support for data rates up to 6400 Mbps
- Designed for rapid integration with Synopsys’ LPDDR5/4/4X controller for a complete DDR interface solution
- DFI 5.0 controller interface
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LPDDR5/4/4X PHY - GF 12LP+ for Automotive ASIL B Random, AEC-Q100 Grade 1
- Supports JEDEC standard LPDDR5X, LPDDR5, LPDDR4 and LPDDR4X SDRAMs
- Support for data rates up to 6400 Mbps
- Designed for rapid integration with Synopsys’ LPDDR5/4/4X controller for a complete DDR interface solution
- DFI 5.0 controller interface
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LPDDR5X/5/4X PHY - TSMC N3A for Automotive, ASIL B Random, AEC-Q100 Grade 2
- Supports JEDEC standard LPDDR5X, LPDDR5 and LPDDR4X SDRAMs
- Support for data rates up to 8533 Mbps
- Designed for rapid integration with Synopsys LPDDR5X/5/4X controller for a complete DDR interface solution
- DFI 5.0 controller interface
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LPDDR5X/5/4X PHY - SS 8LPU for Automotive, ASIL B Random, AEC-Q100 Grade 1
- Supports JEDEC standard LPDDR5X, LPDDR5 and LPDDR4X SDRAMs
- Support for data rates up to 8533 Mbps
- Designed for rapid integration with Synopsys LPDDR5X/5/4X controller for a complete DDR interface solution
- DFI 5.0 controller interface
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LPDDR5X/5/4X PHY - SS SF5A for Automotive, ASIL B Random, AEC-Q100 Grade 2
- Supports JEDEC standard LPDDR5X, LPDDR5 and LPDDR4X SDRAMs
- Support for data rates up to 8533 Mbps
- Designed for rapid integration with Synopsys LPDDR5X/5/4X controller for a complete DDR interface solution
- DFI 5.0 controller interface
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LPDDR5X/5/4X PHY - TSMC N5A for Automotive, ASIL B Random, AEC-Q100 Grade 2
- Supports JEDEC standard LPDDR5X, LPDDR5 and LPDDR4X SDRAMs
- Support for data rates up to 8533 Mbps
- Designed for rapid integration with Synopsys LPDDR5X/5/4X controller for a complete DDR interface solution
- DFI 5.0 controller interface
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UCIe-S PHY for Standard Package (x16) for Automotive in TSMC (N5A)
- Data rates up to 16Gbps per pin
- Self-contained hard macro
- Self-calibrating and training
- Side band channel for initialization and parameter exchange
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16G PHY in TSMC (N7) for Automotive
- Physical Coding Sublayer (PCS) block with PIPE interface
- Supports PCIe 6.0 (PAM-4), 5.0, 4.0, 3.1, 2.1, 1.1 encoding, backchannel initialization
- Supports x1, x2, x4, x8, and x16 hard macro configurations
- Lane margining at the receiver