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Anti-Tamper IP

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Compare 31 IP from 7 vendors (1 - 10)
  • This IP is specially designed for anti-tamper protection which includes both current sense & voltage sense.
    • Process: GSMC 0.18um 1P6M logic process
    • Supply voltage: 2V~3.6V
    • Voltage detectors & Current detectors
    • Operating junction temperature: -40°C≤TJ≤+125°C
  • Quantum Safe, ISO 21434 Automotive-grade Programmable Hardware Security Module
    • The automotive-grade CryptoManager RT-7xx v3 Root of Trust family is the next generation of fully programmable ISO 26262 and ISO 21434 compliant hardware security modules offering Quantum Safe security by design for secure automotive applications.
    • The CryptoManager RT-7xx family protects against a wide range of hardware and software attacks through state-of-the-art side channel attack countermeasures and anti-tamper and security techniques.
    Block Diagram -- Quantum Safe, ISO 21434 Automotive-grade Programmable Hardware Security Module
  • Embedded Hardware Security Module (Root of Trust) - Automotive Grade ISO 26262 ASIL-B
    • The RT-64x Embedded Hardware Security Module (Root of Trust) family are fully programmable, ISO 26262 ASIL-B hardware security cores offering security by design for automotive applications.
    • They protect against a wide range of failures such as permanent, transient and latent faults and hardware and software attacks with state-of-the-art anti-tamper and security techniques.
    Block Diagram -- Embedded Hardware Security Module (Root of Trust) - Automotive Grade ISO 26262 ASIL-B
  • Programmable Root of Trust with Quantum Safe Cryptography acceleration, DPA-resistant & FIA-protected cryptographic accelerators and Caliptra RoTM
    • The CryptoManager RT-6xx v3 Root of Trust family from Rambus is the latest generation of fully programmable FIPS 140-3 compliant hardware security cores offering Quantum Safe security by design for data center and other highly secure applications.
    • Device and system architects face a growing array of security threats, including the threat of quantum computers. Across applications, one constant is the need for a hardware Root of Trust-based security implementation.
    Block Diagram -- Programmable Root of Trust with Quantum Safe Cryptography acceleration, DPA-resistant & FIA-protected cryptographic accelerators and Caliptra RoTM
  • Inline memory encryption engine, for FPGA
    • Performs encryption, decryption and/or authentication using AES Counter Mode (CTR) or Galois Counter Mode (GCM)
    • Supports AES key sizes 128 or 256
    • Internal key management with NIST-compliant key generation
    • Encrypt memory space into user-defined vaults, each with a unique key
    • Compatible with AMBA AXI4 interface
    • Supports hard or soft memory controllers in Xilinx FPGA and SoC devices
    • Supports multiprocessor systems
    Block Diagram -- Inline memory encryption engine, for FPGA
  • Programmable Root of Trust With DPA and FIA for US Defense
    • Custom-designed 32-bit secure RISC-V processor
    • Multi-layered security model protects all core components against a wide range of attacks
    • Security model includes hierarchical privilege model, secure key management policy, hardware-enforced isolation/access control/protection, error management policy
    • State-of-the-art DPA resistance, FIA protection and anti-tamper techniques
    Block Diagram -- Programmable Root of Trust With DPA and FIA for US Defense
  • Embedded Hardware Security Module for Automotive and Advanced Applications
    • Pre-integrated CPU
    • Full suite of hardware-accelerate cryptographic engine (Meet EVITA-Full requirements)
    • Complete SDK with APIs for HSM operations to support chip security applications.
    • MailBox Interface to facilitate communication between the main system and HSM.
    Block Diagram -- Embedded Hardware Security Module for Automotive and Advanced Applications
  • Secure OTP
    • Up to 128kb mass production OTP with built-in instant hardware encryption (customization available)
    • Comprehensive anti-tamper designs in physical and RTL
    • APB control interface with secure/non-secure access privilege
    • Four 256-bit hardware PUF fingerprints for scrambling drop-in-use Secure OTP Storage
    Block Diagram -- Secure OTP
  • TLS 1.3 Compliant Crypto Coprocessor
    • NIST CAVP certified and OSCCA standard compliant crypto engine suite
    • Includes private/public key ciphers, message authentication code, hashes, and key derivation
    • Key wrapping function for the secure export of keys
    • Public-key coprocessor for digital signatures and key agreements over elliptic/Edward curves
    Block Diagram -- TLS 1.3 Compliant Crypto Coprocessor
  • Programmable Root of Trust Family With DPA & Quantum Safe Cryptography
    • Hardware Root of Trust employing a custom 32-bit RISC-V processor
    • Multi-layered security model provides protection of all components in the core
    • NIST CAVP and CMVP compliant for FIPS 140-3 validation
    • State-of-the-art anti tamper techniques
    • DPA-resistant cryptographic accelerators
    • Caliptra Root of Trust for Measurement with DICE and X.509 support
    Block Diagram -- Programmable Root of Trust Family With DPA & Quantum Safe Cryptography
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