Analog and Power Management IP

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Compare 170 IP from 28 vendors (1 - 10)
  • RF and Analog GPS/GNSS Front End for GPS, GLONASS, Galileo and Beidu
    • Single Channel Mode
    • Block Conversion mode
    • Configurable 3/4 wire controller
    • 2/3 bits A/D detection
  • Power Management Subsystem
    • Start-up time: Typ 20us
    • Industry standard digital interface
    • Configurable logic to control sequencing and monitoring
    Block Diagram -- Power Management Subsystem
  • Smart Grid PLC Baseband Processor
    • PLC G3 physical layer (PHY) compliant baseband processor as per ITU-T G.9903 Chapter 7 and ITU-T G.9901 Annex B.
    Block Diagram -- Smart Grid PLC Baseband Processor
  • RTC and PMU Controller on GF 22FDSOI
    • Nano power Real Time Clock (RTC) with 32kHz oscillator
    • PMU control: individual regulators enable / disable control in high / low / ultra-low / adaptive ultra-low power
    • Ultra-low power adaptive mode (Ludicrous)
    • Configurable supply domains isolation support
  • AHB Performance Subsystem - ARM M0
    • Supports Cortex-M0 (or equivalent) processor
    • AMBA® 2.0 (AHB)
    • AHB Multi-matrix bus infrastructure
    • External Nor Flash controller
    Block Diagram -- AHB Performance Subsystem - ARM M0
  • AHB Performance Subsystem - ARM M3
    • Supports Cortex-M3/M4 (or equivalent) processor
    • Power Management Unit
    • AMBA® 2.0 (AHB)
    Block Diagram -- AHB Performance Subsystem - ARM M3
  • Digital Cell Library Samsung
    • Compact standard cell library targeting a wide range of foundries and processes
    • Customised for low-power, ultra-low-leakage, high density or high-speed applications with choices of:
    • Power Management library for low-power designs
    • Timing models for customisable range of PVT
    Block Diagram -- Digital Cell Library Samsung
  • Digital Cell Library SMIC
    • Compact standard cell library targeting a wide range of foundries and processes
    • Customized for low-power, ultra-low-leakage, high density or high-speed applications with choices of:
    • Power Management library for low-power designs
    • Timing models for customizable range of PVT
    Block Diagram -- Digital Cell Library SMIC
  • Digital Cell Library UMC
    • Compact standard cell library targeting a wide range of foundries and processes
    • Customized for low-power, ultra-low-leakage, high density or high-speed applications with choices of:
    • Power Management library for low-power designs
    • Timing models for customizable range of PVT
    Block Diagram -- Digital Cell Library UMC
  • Digital Cell Library TSMC
    • Compact standard cell library targeting a wide range of foundries and processes
    Block Diagram -- Digital Cell Library TSMC
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Semiconductor IP