Complete measurement analog front end (AFE) IP for three-phase power metering

Overview

It is comprised of a high resolution Mixed-signal Front-End and of a dense Power and energy Computation Engine to achieve at the system-level a class accuracy as high as 0.1% (class accuracy of the product is 0.05%) over a range up to 1/10,000.

Key Features

  • Embedded Computation Engine for utility biling applications
  • Low noise Programmable Gain Amplifier (PGA), to reach the best class accuracy with each type of sensors
  • Embedded power management for the best resilience to power supply noise

Technical Specifications

Foundry, Node
TSMC 40nm uLP eFlash
Maturity
Pre-silicon
TSMC
Pre-Silicon: 40nm G , 40nm LP
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Semiconductor IP