AI Co-Processor IP
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7
IP
from 3 vendors
(1
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7)
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Vision AI DSP
- Ceva-SensPro is a family of DSP cores architected to combine vision, Radar, and AI processing in a single architecture.
- The silicon-proven cores provide scalable performance to cover a wide range of applications that combine vision processing, Radar/LiDAR processing, and AI inferencing to interpret their surroundings. These include automotive, robotics, surveillance, AR/VR, mobile devices, and smart homes.
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LPDDR5X Secondary/Slave (memory side!) PHY
- JEDEC standard LPDDR5X @ 8533Mbps (Mbits per second per pin)
- Flexible channel architecture – 16- or 32-bit data path widths, supporting either single x32 channel or two x16 channels – 64-bit support, supporting two x32 channels
- Support for byte-mode DRAM devices for high capacity systems
- ZQ Calibration
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LPDDR5 Secondary/Slave (memory side!) PHY
- JEDEC standard LPDDR5 @ 6400 Mb per second per pin.
- Flexible channel architecture – 16- or 32-bit data path widths, supporting either single x32 channel or two x16 channels – 64-bit support, supporting two x32 channels
- Support for byte-mode DRAM devices for high capacity systems
- ZQ Calibration
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LPDDR4x Secondary/Slave (memory side!) PHY
- JEDEC standard LPDDR4X @ 4267 Mb per second per pin.
- Flexible channel architecture
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LPDDR4x/5 Secondary/Slave (memory side!) PHY
- Supports JEDEC standard LPDDR5, LPDDR4X, LPDDR4
- Secondary side PHY
- Custom implementations available
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Audio and control DSP
- Quad 16x16 MACs
- Dual 32x32 MACs
- 4-way VLIW
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Radar processing IP suite for Advanced Driver Assistance Systems
- The eSi-ADAS™ is a suite of radar accelerator IP including a complete Radar co-processor engine, they enhance the overall performance and capabilities of radar systems for automotive, drone and UAV applications that require fast and responsive situational awareness.
- The IP has been licensed to some of the leading automotive Tier 1 and Tier 2 suppliers and is in production vehicles.
