800Gbps Ethernet Controller IP

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112G-VSR PAM4 SerDes PHY - PPA optimized for short reach connectivity
- 1.25Gbps to 116Gbps flexible data rates allowing simultaneous support of different protocols including Ethernet and OTN
- Power optimized for short-reach applications with configurability
- Superior bit error rate (BER) with extra performance margin beyond short-reach standard requirements
- Beachfront optimized floorplan allows north-south and east-west SoC edge placement
- Comprehensive on-chip diagnostic features make system testing and debugging quick and easy
- Enables 800Gbps networking with PHY and Controller solutions
112G Multi-SerDes
- Designed with a small footprint, ultra-low latency, and low power consumption, the 112G SerDes maximizes bidirectional memory access efficiency, reduces software complexity, and helps chip developers leverage existing Ethernet infrastructure to significantly lower Total Cost of Ownership (TCO).
- Featuring IEEE 802.3-compliant Forward Error Correction (FEC), 35dB ultra-high channel loss compensation, and adaptive high-speed equalization technologies (CTLE, FFE), it provides full-cycle link protection—from error correction to pre-warning—enabling highly compatible, stable, and efficient chip-to-chip connectivity solutions.