112Gbps IP
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47
IP
from 8 vendors
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10)
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Display LVDS single link/dual link Transmitter 1.12Gbps 8-Lane
- LVDS Operational modes supported:
- Data Rate: Up to 1.12Gbps
- Clock polarity programmable
- Data polarity for each data lane is programmable
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112Gbps Serdes USR & XSR
- BIST generator and checker;
- Support data polarity inversion;
- TX/RX status control;
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112Gbps VSR to extended LR SerDes IP on TSMC N5/N4
- TSMC N5/N4 process
- Excellent performance for VSR to extended LR channels from 1G NRZ to 100Gbps PAM4 data rates
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112Gbps XSR SerDes IP on TSMC 5/4nm
- TSMC N5/N4 processes
- Die-to-Die in Multi-chip Modules or Chiplets 128-bits TX/RX digital interface
- Multiple lane RX & TX Macro with integrated PLLs
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112Gbps XSR SerDes IP on TSMC 12nm
- TSMC 12nm
- Die-to-Die in Multi-chip Modules or Chiplets 128-bits TX/RX digital interface
- Multiple lane RX & TX Macro with integrated PLLs
- On chip eye monitor
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112Gbps XSR SerDes IP on TSMC 7/6nm
- TSMC 7nm and 6nm processes
- Die-to-Die in Multi-chip Modules or Chiplets 128-bits TX/RX digital interface
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112Gbps VSR to extended LR SerDes IP on TSMC N7/N6
- Excellent performance for VSR to extended LR channels from 1G NRZ to 100Gbps PAM4 data rates
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112Gbps VSR to extended LR SerDes IP on TSMC 16/12nm
- TSMC 16/12nm process
- Excellent performance for VSR to extended LR channels from 1G NRZ to 100Gbps PAM4 data rates
- Ultra low power
- Area & Power: Please contact us
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112Gbps VSR to extended LR SerDes IP on TSMC N3
- TSMC N3 process
- Single Lane RX & TX Macro with Integrated PLLs
- Automatic calibration of analog circuits
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1-112Gbps Medium Reach (MR) and Very Short Reach (VSR) SerDes
- High speed performance
- Low power architecture
- Sub-sampling clock multiplier
