8051 Processor IP

The M8051EW and M8051W microcontroller cores are high performance versions of the popular 8051 8-bit microcontroller.
The M8051EW includes an On-Chip Instrumentation (OCI) debug unit supporting advanced debug operations (start/stop/single step, breakpoints, and trace) through an IEEE 1149.1 (JTAG) interface.
The M8051W does not include the OCI debug unit and, instead, provides limited debug capabilities (start/stop/single step) through a native debug interface.

The T8051XC3 core implements one of the smallest-available 8-bit MCS®51-compatible microcontrollers.
The core integrates an 8051 CPU with a serial communication controller, flexible timer/counter, multi-purpose I/O port, interrupt controller, and optionally with a debug unit supporting JTAG and Single-Wire interfaces.

The S8051XC3 IP core implements a high-performance, low-energy, 8-bit microcontroller that executes the MCS®51 instruction set and includes a configurable range of features and integrated peripherals.
The core’s sophisticated architecture yields the fastest 8051-compatible 8-bit MCU available anywhere (at the time of its release).

Fully compatible with the MCS® 51 instruction set
Single clock per cycle and efficient architecture for up to 12.1 times the performance of original 8051
Fewer machine cycles means lower average power usage in most applications
Extensive set of optional features and peripherals

software is 100% compatible with 8051 industry standard
Quad-Pipelined architecture enables to run 26.62 times faster, than the original 80C51 at the same frequency
Up to 25.053 VAX MIPS at 100 MHz
24 times faster multiplication

Implementation of a four-wire synchronous full-duplex slave interface, compatible with the Motorola SPI bus.
Supports various message protocols using byte granularity data.
Programmable clock phase and clock and select polarity.
Supports any four-wire clock rate, independent of microcontroller clock rate.