LVDS IP for UMC

Compare 73 LVDS IP for UMC from 5 vendors (1 - 10)

LVDS TX+ (Transmitter) in UMC 40LP
- Compatible with TIA/EIA-644 LVDS Standard
- 49 Mbps - 770 Mbps bandwidth/channel
- Up to 3.08 Gbps data throughput
LVDS interfaces
- Wide operating range
- High data rates
- Very flexible programmability
- Excellent signal integrity
- TIA/EIA644A LVDS and sub-LVDS compatibility
- Receiver also compatible with LVPECL
1.25 Gbps 4-Channel LVDS Deserializer in Samsung 28FDSOI
- 25-180 MHz clock support
- Up to 1.25 Gbps bandwidth
- Up to 5.0 Gbps data throughput
- Full Low power CMOS design
666 Mbps LVDS Transceiver IP
- 666 Mbps operation per channel
- Low power dissipation
- No external components
- Integrated termination resistors in transmitter and receiver.
Camera sub-LVDS/mini-LVDS/LVDS/HiSPi(SLVS-400, HiVCM)/MIPI-DPHY/CMOS 6-7mode Combo-Receiver 1.5Gbps
- MIPI DPHY v1-1/MIPI CSI/TIA/EIA-644 LVDS/SLVS-400 compliant
55nm-SP, FPD-Link Receiver, 3.3V/1.0V, 4 data plus 1 clock channel, 16~85MHz, DLL type,
1.8v LVDS RX IO 800Mbps, UMC 40nm LP/RVT LowK Logic Process
1.8V Sub-LVDS Receiver 650Mbps; UMC 28nm HPC process
3.3V LVDS Transmitter 16~100MHz; 55nm SP/RVT LowK Logic Process
100MHz Reference Clock Single-end to Differential Buffer for PCIE Gen.I; UMC 0.13um HS/FSG LOGIC/MIXEDMODE Enhance Process