I/O Library IP for TSMC

Dolphin Technology offers an extensive array of Interface IP, all of whichhasbeen optimized for ultra high performance across all processes supported.
Our I/O portfolio includes: Standard I/O (General Purpose I/O or GPIO), Specialty I/O (bus-specific I/O), NAND Flash I/O and DDRx & LPDDRx I/O.

Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their SoCs targeting mobile, automotive, and high-performance computing (HPC) applications
The IP is silicon-proven and available in several foundries and process technologies from 3nm to 22nm
Synopsys GPIO library is designed to support multiple voltages; it offers a complete set of support cells (supply, corner spacers, diode breakers, terminators) required to create complete I/O pad rings for system-on-chips (SoCs)
The library is compatible with flip-chip packaging

Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their SoCs targeting mobile, automotive, and high-performance computing (HPC) applications
The IP is silicon-proven and available in several foundries and process technologies from 3nm to 22nm
Synopsys GPIO library is designed to support multiple voltages; it offers a complete set of support cells (supply, corner spacers, diode breakers, terminators) required to create complete I/O pad rings for system-on-chips (SoCs)
The library is compatible with flip-chip packaging

Synopsys’ General-Purpose I/O (GPIO) Library IP provides designers with the input/output operation, functionality, and reliability required for their SoCs targeting mobile, automotive, and high-performance computing (HPC) applications
The IP is silicon-proven and available in several foundries and process technologies from 3nm to 22nm
Synopsys GPIO library is designed to support multiple voltages; it offers a complete set of support cells (supply, corner spacers, diode breakers, terminators) required to create complete I/O pad rings for system-on-chips (SoCs)
The library is compatible with flip-chip packaging

Wide output frequency range support for diverse clocking needs
Implemented with Analog Bits’ proprietary architecture
Low power consumption
Requires no additional on-chip components or band-gaps, minimizing power consumption

CML differential buffer for on-chip applications
Wide Ranges of input frequencies for diverse clocking and data needs
Implemented with Analog Bits’ proprietary architecture
Requires no additional on-chip components or band-gaps, minimizing power consumption