SD/eMMC PHY IP for TSMC

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Compare 27 SD/eMMC PHY IP for TSMC from 3 vendors (1 - 10)
  • TSMC 22ULL 1.8V/3.3V SD/eMMC PHY AG2
    • Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions
    • Synopsys SD/eMMC PHY is a hard IP that can be used to implement a single interface that can accomplish 4-bit, 8-bit eMMC & 4-bit SD operations
    • It includes an optional digi logic circuitry which is required for high-speed operations
    • It complies with eMMC 5.1 (JESD84-B51A) and SDIO 6.0 JEDEC standards
    Block Diagram -- TSMC 22ULL 1.8V/3.3V SD/eMMC PHY AG2
  • TSMC N3E SD/eMMC PHY North/South Poly Orientation
    • Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions
    • Synopsys SD/eMMC PHY is a hard IP that can be used to implement a single interface that can accomplish 4-bit, 8-bit eMMC & 4-bit SD operations
    • It includes an optional digi logic circuitry which is required for high-speed operations
    • It complies with eMMC 5.1 (JESD84-B51A) and SDIO 6.0 JEDEC standards
    Block Diagram -- TSMC N3E SD/eMMC PHY North/South Poly Orientation
  • TSMC N3P SD/eMMC PHY North/South Poly Orientation
    • Synopsys SD/eMMC PHY provides an optimal balance for cost and performance for storage solutions
    • Synopsys SD/eMMC PHY is a hard IP that can be used to implement a single interface that can accomplish 4-bit, 8-bit eMMC & 4-bit SD operations
    • It includes an optional digi logic circuitry which is required for high-speed operations
    • It complies with eMMC 5.1 (JESD84-B51A) and SDIO 6.0 JEDEC standards
    Block Diagram -- TSMC N3P SD/eMMC PHY North/South Poly Orientation
  • M31 eMMC/SDIO at TSMC 28HPC+ Process
    • Supports HS400 (400Mbps), HS200 (200Mbps), High-speed DDR (52Mbps) and etc.
    • Consisting of driver, receiver & pull-up/down resistors
    • Power-sequence free
    • Provides multi-driving-strength selection
    Block Diagram -- M31 eMMC/SDIO at TSMC 28HPC+ Process
  • SD/eMMC - TSMC 7FF, North/South Poly Orientation
    • Compliant with eMMC 5.1 HS400, SD 6.0 SDR104, DDR50, JESD8-7a (1.2V/1.8V) and JESD8c.01 (3.3V)
    • Fully integrated hard macro with high speed IOs and DLL/delay lines
    • Fine resolution DLL/delay lines for HS400 strobe and HS200/SDR104 auto-tuning
    • Easy to integrate with the highly optimized Synopsys SD/eMMC Host Controller IP, providing a complete low risk solution
    Block Diagram -- SD/eMMC - TSMC 7FF, North/South Poly Orientation
  • SD/eMMC - TSMC 6FF, North/South Poly Orientation
    • Compliant with eMMC 5.1 HS400, SD 6.0 SDR104, DDR50, JESD8-7a (1.2V/1.8V) and JESD8c.01 (3.3V)
    • Fully integrated hard macro with high speed IOs and DLL/delay lines
    • Fine resolution DLL/delay lines for HS400 strobe and HS200/SDR104 auto-tuning
    • Easy to integrate with the highly optimized Synopsys SD/eMMC Host Controller IP, providing a complete low risk solution
    Block Diagram -- SD/eMMC - TSMC 6FF, North/South Poly Orientation
  • SD/eMMC - TSMC 28HPM, North/South Poly Orientation
    • Compliant with eMMC 5.1 HS400, SD 6.0 SDR104, DDR50, JESD8-7a (1.2V/1.8V) and JESD8c.01 (3.3V)
    • Fully integrated hard macro with high speed IOs and DLL/delay lines
    • Fine resolution DLL/delay lines for HS400 strobe and HS200/SDR104 auto-tuning
    • Easy to integrate with the highly optimized Synopsys SD/eMMC Host Controller IP, providing a complete low risk solution
    Block Diagram -- SD/eMMC - TSMC 28HPM, North/South Poly Orientation
  • SD/eMMC - TSMC 28HPCP, North/South Poly Orientation
    • Compliant with eMMC 5.1 HS400, SD 6.0 SDR104, DDR50, JESD8-7a (1.2V/1.8V) and JESD8c.01 (3.3V)
    • Fully integrated hard macro with high speed IOs and DLL/delay lines
    • Fine resolution DLL/delay lines for HS400 strobe and HS200/SDR104 auto-tuning
    • Easy to integrate with the highly optimized Synopsys SD/eMMC Host Controller IP, providing a complete low risk solution
    Block Diagram -- SD/eMMC - TSMC 28HPCP, North/South Poly Orientation
  • SD/eMMC - TSMC 16FFPLL, North/South Poly Orientation
    • Compliant with eMMC 5.1 HS400, SD 6.0 SDR104, DDR50, JESD8-7a (1.2V/1.8V) and JESD8c.01 (3.3V)
    • Fully integrated hard macro with high speed IOs and DLL/delay lines
    • Fine resolution DLL/delay lines for HS400 strobe and HS200/SDR104 auto-tuning
    • Easy to integrate with the highly optimized Synopsys SD/eMMC Host Controller IP, providing a complete low risk solution
    Block Diagram -- SD/eMMC - TSMC 16FFPLL, North/South Poly Orientation
  • SD/eMMC - TSMC 16FFPGL, North/South Poly Orientation
    • Compliant with eMMC 5.1 HS400, SD 6.0 SDR104, DDR50, JESD8-7a (1.2V/1.8V) and JESD8c.01 (3.3V)
    • Fully integrated hard macro with high speed IOs and DLL/delay lines
    • Fine resolution DLL/delay lines for HS400 strobe and HS200/SDR104 auto-tuning
    • Easy to integrate with the highly optimized Synopsys SD/eMMC Host Controller IP, providing a complete low risk solution
    Block Diagram -- SD/eMMC - TSMC 16FFPGL, North/South Poly Orientation
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