I2C IP for TSMC
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4
I2C IP
for TSMC
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- 3nm
-
TSMC 3nm (N3E) 1.2V/1.8V I3C Libraries, multiple metalstacks
- Support Schmitt trigger
- 50 ns filter for spike rejection
- Automotive G1/G2 supported, ASIL-B certified
- Silicon-validated IP
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TSMC 3nm (N3E) 1.2V/1.8V I3C Libraries
- Support Schmitt trigger
- 50 ns filter for spike rejection
- Automotive G1/G2 supported, ASIL-B certified
- Silicon-validated IP
-
TSMC 3nm (N3E) 1.5V LVDS
- Maximum operating speed: up to 3.4GBPS
- Compatibility with TIA/EIA - 644-A for greater interoperability
- Loop back option supported for both Pre/Post driver in LVDS TX
- HBM 2KV, CDM 500V (up to 7A)
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TSMC 3nm (N3E) 1.8V SD/eMMC PHY, multiple metalstacks
- Completely hardened PHY solution along with programmable delay chains & I/Os
- Fully selectable output impedance
- Compliant with eMMC 5.1 (JESD84-B51A) and SDIO 3.0 JEDEC Standard
- Automotive G1/G2 supported, ASIL-B certified