Standard cell IP for SMIC
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Standard cell IP
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121
Standard cell IP
for SMIC
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CSMC 0.13um Low Power 9track Standard Cell Library, 1.2v operating voltage
- CSMC 0.13um low power process
- Wide Variety of Cell Functions and Drive Strengths.
- Process-Specific Optimization for High-Density, High-Speed, and Low-Power.
- Engineered for Synthesizability and Routability.
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CSMC 0.13um 9track Standard Cell Library, 1.2v operating voltage
- CSMC 0.13um generic process
- Wide Variety of Cell Functions and Drive Strengths.
- Process-Specific Optimization for High-Density, High-Speed, and Low-Power.
- Engineered for Synthesizability and Routability.
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VeriSilicon SMIC 0.13um 1.2V/3.3V SSTLCOMBO_02 I/O Cell Library
- SMIC 0.13um Logic 1P8M Salicide 1.2V/3.3V process
- Suitable for six, seven and eight metal layers’ physical design
- 35um/70um nominal pad pitch for stagger/linear application
- Support SSTL2 and SSTL18
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SMIC 0.13um High Vt Process, 1.2V/2.5V standard cell Library
- VeriSilicon SMIC 0.13um High-Vt High-Density Standard Cell Library uses metal 1 only within the cells and supports design with four, five, six, seven or eight layers of metal.
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SMIC 0.13um General Process, 1.2V/2.5V Standard Cell Library
- VeriSilicon SMIC 0.13um High-Density Standard Cell Library uses metal 1 only within the cells and supports design with four, five, six, seven or eight layers of metal.
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SMIC 0.18um Low Leakage 9 track Standard Cell Library,1.8v operating voltage
- SMIC 0.18um Logic Low Lekage 1P6M 1.8V/3.3V process
- Wide Variety of Cell Functions and Drive Strengths.
- Process-Specific Optimization for High-Density, High-Speed, and Low-Power.
- Engineered for Synthesizability and Routability.