Memory Interfaces IP for SMIC
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Memory Interfaces IP
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4
Memory Interfaces IP
for SMIC
from 2 vendors
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4)
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SSTL_15 IO Pad Set
- ? Full DDR3 capability - 800MHz (1600 MT/s)
- ? Low Power driving standard DDR3 memories
- ? User programmable ODT Capability - dynamic 6-Bit PVT calibration to an external reference resistor
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SSTL_15 / SSTL_18 Combo I/O Pad Set
- ? Full DDR3 capability - 800MHz (1600 MT/s)
- ? Full DDR2 capability
- ? Low Power driving standard DDR3 memories
- ? User programmable ODT Capability - dynamic 6-Bit PVT calibration to an external reference resistor
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7 way DDR combo
- Full DDR4 capability
- Full DDR3 / DDR3L / DDR3U capability
- Full LPDDR4 capability
- Full LPDDR3 capability
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Memory Compiler in TSMC(16nm,22nm,28nm,40nm,55nm,90BCD+,110nm,152nm,180BCD)
- Synchronous read/write operation
- Low leakage current and lower operation power consumption
- Minimum metal layer requirement: 4/3 metal layers
- High density layout structure and small area design