ADC / DAC IP for SMIC

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Compare 77 ADC / DAC IP for SMIC from 10 vendors (1 - 10)
  • 24-bit Cap-less ADC 106 dB SNR
    • I2C and APB control interface
    • Embedded low noise voltage regulator for best resilience to power supply noise
    • Low BoM and capacitor-less input connection
    • High dynamic range for high quality recording in far-field applications
    Block Diagram -- 24-bit Cap-less ADC 106 dB SNR
  • 24-bit Cap-less ADC 106 dB SNR low power and low latency 3 channels
    • I2C and APB control interface
    • Embedded low noise voltage regulator for best resilience to power supply noise
    • Low BoM and capacitor-less input connection
    • High dynamic range for high quality recording in far-field applications
    Block Diagram -- 24-bit Cap-less ADC 106 dB SNR low power and low latency 3 channels
  • 7 to 150 MHz digitally controlled oscillator
    • SMIC CMOS 180 nm
    • Wide oscillation frequency adjustment range (7 MHz…150 MHz)
    • No external components required
    • Portable to other technologies (upon request)
    Block Diagram -- 7 to 150 MHz digitally controlled oscillator
  • 10-bit Video DAC
    • This Video DAC specifies a 3-channel 10-bit resolution, high performance, low power CMOS Digital-to-Analog Converter (DAC) which offers exceptional direct current and alternating current performance and supports update rate up to 240MSPS with a stand-by mode to reduce the power dissipation.
    • The segmented current steering architecture is combined with a proprietary switching technique to reduce spurious components and enhance dynamic performance. Edge-triggered input latch and temperature compensated bandgap reference have been integrated to provide a complete monolithic DAC solution.
    Block Diagram -- 10-bit Video DAC
  • Video ADC - 12-bit Successive Approximation Register (SAR) ADC
    • The analog-to-digital converter is a differential high speed low power IP which uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution.
    • The ADC includes a core internal SAR ADC which consists of sample/hold circuits, a capacitive DAC, a comparator and logic control circuits.
    • The ADC is designed with high dynamic performance for input signal frequencies up to Nyquist.
    • It is perfectly suitable for broadband communication applications.
    Block Diagram -- Video ADC - 12-bit Successive Approximation Register (SAR) ADC
  • Auxiliary DAC - 12-bit Successive Approximation Register (SAR) DAC
    • Silicon proven in 22, 28, 40, 55, 65, 110, 130, 180nm from SMIC, HHgrace, GlobalFoundries and Samsung
    • Resolution: 12-bit
    • Update Rate: 1Msps
    • Power Consumption: 1mA@1Msps
    Block Diagram -- Auxiliary DAC - 12-bit Successive Approximation Register (SAR) DAC
  • Audio CODEC with 100 dB Dynamic Range, 24-bit stereo PWM DAC, six-channel ADC
    • WhisperTrigger-d - Ultra-low power always-on voice detection
    • Embedded low noise voltage regulator for best resilience to power supply noise
    • Automatic Gain Control (AGC)
    • Wind Noise Filter (WNF)
    Block Diagram -- Audio CODEC with 100 dB Dynamic Range, 24-bit stereo PWM DAC, six-channel ADC
  • Auxiliary ADC - 12-bit Successive Approximation Register (SAR) ADC
    • Silicon proven in 22, 28, 40, 55, 65, 110, 130, 180nm from SMIC, HHgrace, Global Foundries and Samsung
    • Resolution: 12-bit
    • Data Rate: 1Msps/200Ksps
    • DNL: ±1.5 LSB, INL: ±3 LSB
    Block Diagram -- Auxiliary ADC - 12-bit Successive Approximation Register (SAR) ADC
  • 10-bit 1-channel 100 MHz current DAC
    • SMIC EEPROM CMOS 0.18 um technology
    • Resolution 10 bits
    • 100 MSPS update rate
    • High spurious free dynamic range performance up to 25 MHz output
    Block Diagram -- 10-bit 1-channel 100 MHz current DAC
  • 11 to 25 MHz Band-pass filter
    • SMIC CMOS 0.18 um
    • Wide cut-off frequency adjustment range (11 MHz…25 MHz)
    • Programmable bandwidth
    • Narrowband and wideband modes (3 MHz, 5 MHz)
    Block Diagram -- 11 to 25 MHz Band-pass filter
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