Analog IP for Samsung
Welcome to the ultimate
Analog IP
for
Samsung
hub! Explore our vast directory of
Analog IP
for
Samsung
All offers in
Analog IP
for
Samsung
Filter
Compare
58
Analog IP
for
Samsung
from
12
vendors
(1
-
10)
-
14-bit, 1200 MSPS Ultra Low Power ADC in 28nm CMOS
- 14-bit resolution, sampling rate up to 1200 MSPS
- Fully differential operation, fully specified from -40C to 125C
- Ultra low power dissipation
- Internal bandgap and voltage reference
-
PVT Sensor Subsystem
- Start-up time: Typ 20us
- Current consumption: Max 25uA
- Industry standard digital interface
- Fully integrated macro
- Standard AMBA APB interface
-
All Digital Fractional-N RF Frequency Synthesizer PLL in Samsung 14LPP
- Ultra-low jitter, less than 300fs RMS integrated between 12kHz to 20MHz.
- Suitable for many RF applications, including LO, clocks for, ADC, DAC, high-speed PHY
- Small die area (< 0.05 sq mm), using a LC tank oscillator
- Output frequency can be from 1 to 2047 times the input reference, up to 8GHz
-
All Digital Fractional-N RF Frequency Synthesizer PLL in Samsung 8LPP
- Fractional Multiplication with frequencies up to 8GHz
- Extremely low jitter (< 300fs RMS)
- Small size (< 0.05 sq mm)
- Low Power (< 7mW)
-
All Digital Fractional-N PLL for Performance Computing in Samsung 8LPP
- Fractional multiplication with frequency up to 4GHz
- Low jitter (< 10ps RMS)
- Small size (< 0.01 sq mm)
- Low Power (< 5mW)
- Support for multi-PLL systems
-
All Digital Fractional-N PLL for Performance Computing in Samsung 14LPP
- Fractional multiplication with frequency up to 4GHz
- Low jitter (< 10ps RMS)
- Small size (< 0.01 sq mm)
- Low Power (< 5mW)
- Support for multi-PLL systems
-
General Purpose All Digital Fractional-N PLL in Samsung 14LPP
- Low jitter (< 18ps RMS)
- Small size (< 0.01 sq mm)
- Low Power (< 3.5mW)
- Support for multi-PLL systems
-
General Purpose All Digital Fractional-N PLL in Samsung 8LPP
- Low jitter (< 18ps RMS)
- Small size (< 0.01 sq mm)
- Low Power (< 3.5mW)
- Support for multi-PLL systems
-
Low Power All Digital Fractional-N PLL in Samsung 14LPP
- Low power, suitable for IoT applications
- Good jitter, suitable for clocking digital logic.
- Extremely small die area (< 0.005 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 1.5GHz
- Reference clock from 5MHz to 200MHz
-
Low Power All Digital Fractional-N PLL in GlobalFoundries 12LPP/14LPP
- Low power, suitable for IoT applications
- Good jitter, suitable for clocking digital logic.
- Extremely small die area (< 0.005 sq mm), using a ring oscillator
- Output frequency can be from 1 to 400 times the input reference, up to 1.5GHz
- Reference clock from 5MHz to 200MHz
