DDR5 IP for GLOBALFOUNDRIES
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- 12nm
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DDR PHY
- DDR5/4/3 training with write-leveling and data-eye training
- Optional clock gating available for low-power control
- Internal and external datapath loop-back modes
- I/O pads with impedance calibration logic and data retention capability
- Programmable per-bit (PVT compensated) deskew on read and write datapaths
- RX and TX equalization for heavily loaded systems
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DDR5/4 PHY - GF 12LP+
- Supports JEDEC standard DDR5 and DDR4 SDRAMs
- High-performance DDR PHY supporting data rates up to 8400 Mbps
- PHY independent, firmware-based training using an embedded calibration processor
- Supports up to 4 trained states/ frequencies with <3μs switching time
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DDR4 Multi-modal PHY - GLOBALFOUNDRIES 12nm
- PLL-based clocking with internal clock alignment to the parallel clock on the memory controller interface
- Autonomous initialization
- Support for x72 bit channel
- Support for multiple DRAM widths (x4, x8, x16, x32)
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DDR4 PHY - GLOBALFOUNDRIES 12nm
- PLL-based clocking with internal clock alignment to the parallel clock on the memory controller interface
- Autonomous initialization
- Support for x72 bit channel
- Support for multiple DRAM widths (x4, x8, x16, x32)
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LPDDR4X multiPHY Plus in GF (12nm)
- Low latency, small area, low power
- Compatible with JEDEC standard LPDDR4 SDRAMs up to 4,267 Mbps
- Maximum data rate is process technology dependent
- Compatible with JEDEC standard DDR4 SDRAMs up to 3,200 Mbps
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DDR5/4 PHY in GF (12nm)
- Low latency, small area, low power
- Compatible with JEDEC standard DDR5 SDRAMs up to 8400 Mbps
- Compatible with JEDEC standard DDR4 SDRAMs up to 3200 Mbps
- DFI 5.0 compliant interface to the memory controller