Novelics’ coolSRAM-6T embedded memory IP is an ideal solution for ASIC, ASSP and System-on-Chip (SoC) applications with stringent power, speed or area requirements. Embedded coolSRAM-6T is designed to deliver the best performance and power characteristics at any given instance size.
The coolSRAM-6T IP is based on the production-proven, foundry-provided 6T SRAM cell and offers advanced leakage control features, near zero setup times and optional column and row redundancy.
Use of patented Novelics circuit technologies minimize leakage current and active power in both the memory core and the peripheral circuit. This is complemented by optional power management modes that can be applied to the entire memory core or restricted to specific memory blocks. In addition, the SRAM-6T has been optimized to meet the performance requirements of very high speed applications such as processor cache.
The coolSRAM-6T IP has been thoroughly silicon validated to ensure the highest level of manufacturability. The compilers have been extensively verified and characterized to help ensure the highest quality of deliverables.
Low power, high speed, and high density configurable SRAM
Overview
Key Features
- Features- Customer architected through the MemQuest memory compiler and characterization tool
- Based on foundry-provided 6T SRAM cell
- Reliable, silicon-proven architecture
- Single port architecture
- Reliable operation and performance well beyond normal Process / Voltage / Temperature variations
- Supports large instances
- Selectable power, speed, and area- Selectable word width, depth and aspect ratio
- Easily configurable options including column and/or row redundancy, subword writeable and ECC- Advanced power management sleep modes
- Block-by-block leakage power management
- Optimized for high performance and low power designs
- Uses only up to metal 4
- Supports power mesh and power ring
- Flexible routing over macro in M5 and above
- Near zero setup time
- Supports industry standard BIST and BISR methodologies
- Advance manufacturing defect detection through margin setting test modes
- Offered in leading-edge process nodes at major foundries
- Support for SVT & HVT transistors
Technical Specifications
Availability
Now
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