Low power, high speed, and high density configurable Double Density SRAM

Overview

Novelics compiler-based family of advanced embedded memories includes low power, high speed, and high density configurable coolSRAM-1T™ targeting DTV, MP3, mobile and networking SoC applications.

Embedded coolSRAM-1T™ blocks are user definable for configuration and provides an unprecedented mix of power, density and cost for SoCs.

Behind Novelics breakthrough embedded memory performance is an advanced compiler-based memory generator and optimizer, MemQuest™ that enables the concurrent optimization of power, speed, density, and DFM/DFT objectives.

Key Features

  • Based on patent-pending 1T cell design
  • Implemented with unmodified standard CMOS logic process
  • Best-in-class active power, leakage current, density, and speed
  • Supports large instances (e.g. 32Mbit)
  • Selectable process nodes, power, speed, and aspect ratio
  • Selectable row/column redundancy
  • Advanced power management modes
  • Ideal for portable applications requiring ultra low power at high densities and high speed applications that can benefit from advanced power management features
  • Flexible IP Licensing Models

Benefits

  • Provides 2x density advantage
  • Active & Standby power, similar to SRAM architectures
  • Lower cost due to higher density
  • Silicon & production validated
  • Lower total cost of ownership and time-to-profit
  • PERFORMANCE HIGHLIGHTS: *(0.13ìm process node)
    • Operating Temperature: -40°C - +125°C
    • Operating Voltage Range: 0.9V – 1.32V
    • Low power versions, optimized to operate at up to 150 MHz (0.13um worst case conditions)

Technical Specifications

Availability
Now
TSMC
In Production: 130nm G
Pre-Silicon: 40nm G
Silicon Proven: 65nm G , 90nm G
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Semiconductor IP