An all-digital solution suitable for clock/data recovery of HDB3/B3ZS coded signals.
Clock and Data Recovery of HDB3/B3ZS coded signals
Overview
Key Features
- Performs receive clock and data recovery on HDB3/B3ZS coded data.
- Programmable jitter attenuator.
- Loss of signal detection.
- Frequency aided acquisition using external reference clock.
- Fast acquisition time.
- Narrow bandwidth digital phase locked Loop.
- NCO used for an all-digital implementation.
Block Diagram
Deliverables
- Synthesizable VHDL or Verilog source code.
- VHDL or Verilog test bench with example configuration files.
- Synthesis scripts.
- Users manual.
- Free 3 months technical support.
Technical Specifications
Short description
Clock and Data Recovery of HDB3/B3ZS coded signals
Vendor
Vendor Name
Foundry, Node
TSMC 0.18um
Maturity
Silicon proven
Availability
Now
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