TSMC Extends Open Innovation Platform
June 7, 2010
TSMC today extended one of the most effective semiconductor design enablement initiatives the semiconductor world has ever seen, the Open Innovation Platform (OIP). Morris Chang coined the term “OIP” himself in 2008, but the effort itself is 10+ years old with a collective cost > .5B$. My other blogs on topic include: TSMC OIP vs CDNS OIP Analysis, TSMC Open Innovation Platform Explained, and TSMC iPDK Debate.
Related Semiconductor IP
- 1.8V/3.3V I/O Library with 5V ODIO & Analog in TSMC 16nm
- ESD Solutions for Multi-Gigabit SerDes in TSMC 28nm
- High-Speed 3.3V I/O library with 8kV ESD Protection in TSPCo 65nm
- Verification IP for DisplayPort/eDP
- Wirebond Digital and Analog Library in TSMC 65nm
Related Blogs
- TSMC OIP: On the Road to the Silicon Super Chip
- TSMC OIP: What to Do With 20,000 Wafers Per Day
- TSMC OIP and the Insatiable Computing Trend!
- TSMC OIP: Process Status
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