TSMC Extends Open Innovation Platform
June 7, 2010
TSMC today extended one of the most effective semiconductor design enablement initiatives the semiconductor world has ever seen, the Open Innovation Platform (OIP). Morris Chang coined the term “OIP” himself in 2008, but the effort itself is 10+ years old with a collective cost > .5B$. My other blogs on topic include: TSMC OIP vs CDNS OIP Analysis, TSMC Open Innovation Platform Explained, and TSMC iPDK Debate.
Related Semiconductor IP
- 50MHz to 800MHz Integer-N RC Phase-Locked Loop on SMIC 55nm LL
- Simulation VIP for AMBA CHI-C2C
- Process/Voltage/Temperature Sensor with Self-calibration (Supply voltage 1.2V) - TSMC 3nm N3P
- USB 20Gbps Device Controller
- SM4 Cipher Engine
Related Blogs
- TSMC OIP: What to Do With 20,000 Wafers Per Day
- TSMC OIP and the Insatiable Computing Trend!
- TSMC OIP: Process Status
- Analog Bits Builds a Road to the Future at TSMC OIP
Latest Blogs
- Powering Scale Up and Scale Out with 224G SerDes for UALink and Ultra Ethernet
- Arm and Synopsys: Delivering an Integrated, Nine-Stage “Silicon-to-System” Chip Design Flow
- Accelerate Automotive System Design with Cadence AI-Driven DSPs
- What Makes FPGA Architecture Ideal for Ultra-Low-Latency Systems?
- Introducing agileSecure anti-tamper security portfolio