TSMC Extends Open Innovation Platform
June 7, 2010
TSMC today extended one of the most effective semiconductor design enablement initiatives the semiconductor world has ever seen, the Open Innovation Platform (OIP). Morris Chang coined the term “OIP” himself in 2008, but the effort itself is 10+ years old with a collective cost > .5B$. My other blogs on topic include: TSMC OIP vs CDNS OIP Analysis, TSMC Open Innovation Platform Explained, and TSMC iPDK Debate.
Related Semiconductor IP
- Multi-channel, multi-rate Ethernet aggregator - 10G to 400G AX (e.g., AI)
- Multi-channel, multi-rate Ethernet aggregator - 10G to 800G DX
- 200G/400G/800G Ethernet PCS/FEC
- 50G/100G MAC/PCS/FEC
- 25G/10G/SGMII/ 1000BASE-X PCS and MAC
Related Blogs
- TSMC OIP: What to Do With 20,000 Wafers Per Day
- TSMC OIP and the Insatiable Computing Trend!
- TSMC OIP: Process Status
- Analog Bits Builds a Road to the Future at TSMC OIP