TSMC Earthquake Damage Redo
March 15, 2010
As you may know I enjoy poking fun at the current state of semiconductor design and manufacture media; sloppy reporting, editors with little or no actual semiconductor experience taking corporate marketing spins on news/events and passing it along as fact.
This time it is the ElectronicsWeakly top viewed article TSMC Loses 40K Wafers In Quake by one of my fellow bloggers David Manners. There was a lot of press on this topic last week but David is the only one to put a number (40,000 wafers, which is significant) on the loss, and he led with it in an article versus his blog (insert sinister music here). The question is: Where did David get a 40,000 wafer loss number?
Related Semiconductor IP
- USB 20Gbps Device Controller
- AGILEX 7 R-Tile Gen5 NVMe Host IP
- 100G PAM4 Serdes PHY - 14nm
- Bluetooth Low Energy Subsystem IP
- Multi-core capable 64-bit RISC-V CPU with vector extensions
Related Blogs
- TSMC Reiterates 2013-14 450mm Trial Production Plan
- TSMC 28nm Yield Explained!
- TSMC absolutely did NOT halt 28nm production!
- NVIDIA Claims TSMC 20nm will not Scale?
Latest Blogs
- The Hidden Threat in Analog IC Migration: Why Electromigration rules can make or break your next tapeout
- MIPI CCI over I3C: Faster Camera Control for SoC Architects
- aTENNuate: Real-Time Audio Denoising
- From guesswork to guidance: Mastering processor co-design with Codasip Exploration Framework
- Enabling AI Innovation at The Far Edge