PCIe Gen4 - VIP/IP Solution with Protocol-Aware Debug and Source Code Test Suites
October 28, 2015
Today’s PCIe verification engineers have to trade-off between verification completeness and demanding time to market, and the new Gen4 specification makes it more challenging. This video highlights Synopsys’ complete PCIe Gen4 solution that includes implementation IP (Controller/PHY), Verification IP, protocol-aware debug and source code test suites to accelerate verification closure.
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Related Blogs
- Introducing Synopsys VIP for PCIe Gen4
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- PCIe PIPE 4.4.1: Enabler for PCIe Gen4
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