Overcoming the Protocol Debug Challenge
January 23, 2015
In this talk, Synopsys R&D Director Bernie DeLay describes advanced methods for protocol-aware debug and how to use advanced debug techniques like protocol abstraction in a unified debug environment to find the root cause of errors for the most complex of bus and interface protocols
Related Semiconductor IP
- Multi-channel, multi-rate Ethernet aggregator - 10G to 400G AX (e.g., AI)
- Multi-channel, multi-rate Ethernet aggregator - 10G to 800G DX
- 200G/400G/800G Ethernet PCS/FEC
- 50G/100G MAC/PCS/FEC
- 25G/10G/SGMII/ 1000BASE-X PCS and MAC
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