What’s on the Horizon for NAND and DRAM?
February 5, 2010
January is a time where lots of planning and forecast are made, with high hopes usually. Semiconductor memory industry, after several years of prolonged downturn, finally started to see some glimpses of recovery lately. Prices are improving, product migrations happening, new process node migration providing production efficiency and hopefully more profitability to the manufacturers.
Related Semiconductor IP
- eUSB2V2.0 Controller + PHY IP
- I/O Library with LVDS in SkyWater 90nm
- 50G PON LDPC Encoder/Decoder
- UALink Controller
- RISC-V Debug & Trace IP
Related Blogs
- More signs of spring for the 2010 DRAM market
- DRAM vendors look to 40nm process technology to keep DRAM profits flowing next year
- Cadence support for the Open NAND Flash Interface (ONFI) 3.0 controller and PHY IP solution + PCIe Controller IP opening the door for NVM Express support
- AMD GPUs using new HBM DRAM (and the cost/benefit appears balanced!)
Latest Blogs
- Deploying StrongSwan on an Embedded FPGA Platform, IPsec/IKEv2 on Arty Z7 with PetaLinux and PQC
- The Rise of Physical AI: When Intelligence Enters the Real World
- Can Open-Source ISAs Catalyze Smart Manufacturing?
- The Future of AI is Modular: Why the SiFive-NVIDIA Milestone Matters
- Heterogeneous Multicore using Cadence IP