Where does LPDDR3 SDRAM fit in the low-power memory universe? How about Wide I/O SDRAM?

By _Cadence - Denali Memory Report

March 23, 2012

Marc Greenberg, Director of Product Marketing in the Cadence SoC Realization Design IP Group, just sent me some slides in connection with the recent introduction of the Cadence design and verification IP portfolio for LPDDR3 low-power SDRAM. I’ve already written a blog about the portfolio introduction but there are slides in Marc’s presentation that detail where LPDDR3 SDRAMs (and Wide I/O memory) fit in the low-power SDRAM universe and that’s information well worth discussing.

First, here’s a graphic showing you the SDRAM universe prior to the introduction of LPDDR2 SDRAM.

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