Ivo Bolsens of Xilinx and Crossover Designs
April 28, 2011
I was at Mentor's u2u (user group) meeting and one of the keynotes was by Ivo Bolsens of Xilinx.
Ivo started off talking analogizing SoCs as the sports-cars of the industry (fast but expensive), and FPGAs as the station wagons (not cool). In fact he even said that when Xilinx started an FPGA was a pretty silly idea.
To read the full article, click here
Related Semiconductor IP
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- DDR5 MRDIMM PHY and Controller
- RVA23, Multi-cluster, Hypervisor and Android
- HBM4E PHY and controller
- LZ4/Snappy Data Compressor
Related Blogs
- PLD Overview: Xilinx and Altera
- Xilinx ARMs FPGAs, Altera to MIPSify Them
- Intel Eyeing Xilinx?
- DDR3/DDR2 price crossover reached
Latest Blogs
- lowRISC Tackles Post-Quantum Cryptography Challenges through Research Collaborations
- How to Solve the Size, Weight, Power and Cooling Challenge in Radar & Radio Frequency Modulation Classification
- Programmable Hardware Delivers 10,000X Improvement in Verification Speed over Software for Forward Error Correction
- The Integrated Design Challenge: Developing Chip, Software, and System in Unison
- Introducing Mi-V RV32 v4.0 Soft Processor: Enhanced RISC-V Power