Ivo Bolsens of Xilinx and Crossover Designs
I was at Mentor's u2u (user group) meeting and one of the keynotes was by Ivo Bolsens of Xilinx.
Ivo started off talking analogizing SoCs as the sports-cars of the industry (fast but expensive), and FPGAs as the station wagons (not cool). In fact he even said that when Xilinx started an FPGA was a pretty silly idea.
To read the full article, click here
Related Semiconductor IP
- Flexible Pixel Processor Video IP
- Bluetooth Low Energy 6.0 Digital IP
- Verification IP for Ultra Ethernet (UEC)
- MIPI SWI3S Manager Core IP
- Ultra-low power high dynamic range image sensor
Related Blogs
- PLD Overview: Xilinx and Altera
- Xilinx ARMs FPGAs, Altera to MIPSify Them
- Intel Eyeing Xilinx?
- DDR3/DDR2 price crossover reached
Latest Blogs
- How is RISC-V’s open and customizable design changing embedded systems?
- Imagination GPUs now support Vulkan 1.4 and Android 16
- From "What-If" to "What-Is": Cadence IP Validation for Silicon Platform Success
- Accelerating RTL Design with Agentic AI: A Multi-Agent LLM-Driven Approach
- UEC-CBFC: Credit-Based Flow Control for Next-Gen Ethernet in AI and HPC